NCP1937B3DR2G PDF даташит
Спецификация NCP1937B3DR2G изготовлена «ON Semiconductor» и имеет функцию, называемую «Combination Power Factor Correction and Quasi- Resonant Flyback Controllers». |
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Детали детали
Номер произв | NCP1937B3DR2G |
Описание | Combination Power Factor Correction and Quasi- Resonant Flyback Controllers |
Производители | ON Semiconductor |
логотип |
30 Pages
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NCP1937
Combination Power Factor
Correction and Quasi-
Resonant Flyback
Controllers for Adapters
This combination IC integrates power factor correction (PFC) and
quasi−resonant flyback functionality necessary to implement a
compact and highly efficient Switched Mode Power Supply for an
adapter application.
The PFC stage exhibits near−unity power factor while operating in a
Critical Conduction Mode (CrM) with a maximum frequency clamp.
The circuit incorporates all the features necessary for building a robust
and compact PFC stage while minimizing the number of external
components.
The quasi−resonant current−mode flyback stage features a
proprietary valley−lockout circuitry, ensuring stable valley switching.
This system works down to the 4th valley and toggles to a frequency
foldback mode with a minimum frequency clamp beyond the 4th
valley to eliminate audible noise. Skip mode operation allows
excellent efficiency in light load conditions while consuming very low
standby power consumption.
Common General Features
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MARKING DIAGRAM
1
HV/X2
20
PFBHV
BO/X2
SOIC−20
Narrow Body
PControl
PONOFF
QCT
CASE 751BS Fault
PSTimer
QFB
PFBLV
GND
PCS/PZCD
PDRV
QDRV
QCS
VCC
QZCD
NCP1937 = Specific Device Code
xx = A1, A2, A3, B1, B2, B3, C1, C4 or C61
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
• Wide VCC Range from 9 V to 30 V with Built−in Overvoltage
Protection
• High−Voltage Startup Circuit and Active Input Filter Capacitor
Discharge Circuitry for Reduced Standby Power
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
• Integrated High−Voltage Brown−Out Detector
• Integrated High−Voltage Switch Disconnects PFC Feedback Resistor
Divider to Reduce Standby Power
• Fault Input for Severe Fault Conditions, NTC
• Feed−Forward for Improved Operation across Line and
Compatible (Latch and Auto−Recovery Options)
Load
• 0.5 A / 0.8 A Source / Sink Gate Drivers
• Adjustable PFC Disable Threshold Based on Output
• Internal Temperature Shutdown
Power
• Power Savings Mode Reduces Supply Current
Consumption to 70 mA Enabling Very Low Input Power
Applications
QR Flyback Controller Features
• Valley Switching Operation with Valley−Lockout for
Noise−Free Operation
PFC Controller Features
• Critical Conduction Mode with Constant On Time
Control (Voltage Mode) and Maximum Frequency
• Frequency Foldback with Minimum Frequency Clamp
for Highest Performance in Standby Mode
• Minimum Frequency Clamp Eliminates Audible Noise
Clamp
• Accurate Overvoltage Protection
• Timer−Based Overload Protection (Latched or
Auto−Recovery options)
• Bi−Level Line−Dependent Output Voltage
• Adjustable Overpower Protection
• Fast Line / Load Transient Compensation
• Winding and Output Diode Short−Circuit Protection
• Boost Diode Short−Circuit Protection
• 4 ms Soft−Start Timer
© Semiconductor Components Industries, LLC, 2013
November, 2013 − Rev. 3
1
Publication Order Number:
NCP1937/D
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NCP1937
Figure 1. Typical Application Circuit
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2
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NCP1937
PFBHV
20
PFBLV
18
Enable
PFC
PUVP
+ VPFB(HYS)
−VPFB(disable)
Latch
Auto−recovery
LineVRCeCm(reosveat)l
KPOVP(xL)
PFC
OVP
POVP
Brownout
Low/High Line
DPOVP(xL) Detection
VCC_OK
IPControl(boost)
In PSM
KLOW KLOW(HYS)
Low/High Line QR_EN
Central
Logic
Soft−start
Low/High Line
Brownout
Line Removal
QR_EN
VCC_OK
In PSM
High Voltage
Startups,
Detection, and
Logic
Reset
VVCCCC_OOVKP
VCC(rVesDeDt)
VCC
Management
Istart
Line Removal
VQILIM1
ICC(discharge)
BO/X2
3
HV/X2
1
VCC
12
CCC
PControl
5
PDRV
15
+
VPREF(xL) −
IEA
In Regulation
VPCONTROL(MAX)
CLlaomwp
PUVP
Disable PFC
PSKIP
+−DVPSKIP
In Regulation PPOUVVPP
PFCDRV PPISLKIMIP1
PILIM2
ON Time
Ramp
Level
Shift
PFCDRV
VQFB
QZCD
Soft−Start
Disable PFC
tPisable
VPONHYS
IPONOFF
+
−VPOFF
PONOFF
6
RQ
Dominant
Reset Latch
SQ
PFCDRV
RQ
SDoRLmaetsicnehatntQ
Valley
QRDRV
QDRV
14
tQ(toutx)
ZCD
Detect
Soft−start
VQZCD
QZCD
11
PILIM2
PFCDRV
PFCDRV
tPTFimC(eorff)
Frequency
Clamp
tdelay(QSKIP)
QSkip
VQZCD(hys)
VQZCD(th)
Minimum
Frequency
Oscillator
VCO
CT
Setpoint
QRDRV
VQFB
IQCT
QCT
PCS/PZCD
16
Fault
8
ZCD
Detect
+−VPZCD
PZCD
LEB1
PZCD
tP(tout)
PILIM1
+
− VPILIM1
PILIM2
LEB2 +
Counter nPILIM2
IOTP
− VPILIM2
OVP
VFault(OVP)
OTP
TSD
QOVLD
nQILIM2
nPILIM2
OVP
VCCOOTVPP
S
S
S
S
S
S
S
Fault
Logic
VCO
QRDRV
7
QSkip
tonQR(MAX)
QRDRV
Latch
Valley
QSkip
VCO
IQFB
RQFB
Valley In_PSM
Select
Logic
VQFB
QFB
10
+ /KQFB
VQZCD
GND
17
QILIM1
Auto−recovery
LEB1
PSTIMER
9
VFault(OTP_in)
IPSTimer1/2
Line Removal
Brownout
VCC(reset)
In_PSM PSM
Detection
In PSM
R
R
R
Temperature
TSD
QOVLD
nQILIM2
tQOVLD
QILIM2
Counter
VQZCD +
VQILIM1
LEB2
IQCS
QCS
13
Initial Discharge VCC_OK
VQILIM2
Figure 2. Functional Block Diagram
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NCP1937B3DR2G | Combination Power Factor Correction and Quasi- Resonant Flyback Controllers | ON Semiconductor |
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