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PDF BUK762R0-40C Data sheet ( Hoja de datos )
| Número de pieza | BUK762R0-40C | |
| Descripción | N-channel TrenchMOS standard level FET | |
| Fabricantes | NXP Semiconductors | |
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BUK762R0-40C
N-channel TrenchMOS standard level FET
Rev. 02 — 20 August 2007
Product data sheet
1. Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using Philips Ultra High-Performance Automotive (UHP) TrenchMOS technology.
This product has been designed and qualified to the appropriate AEC standard for use in
Automotive critical applications.
1.2 Features
175 °C rated
Q101 compliant
Low on-state resistance
Standard level compatible
1.3 Applications
12 V loads
General purpose power switching
Automotive systems
Motors, lamps, solenoids
1.4 Quick reference data
Table 1. Quick reference
Symbol Parameter
Conditions
Min Typ Max Unit
ID drain current
VGS = 10 V; Tmb = 25 °C;
see Figure 1 and 4
[1][2] - - 100 A
Ptot total power dissipation Tmb = 25 °C; see Figure 2
Static characteristics
- - 333 W
RDSon
drain-source on-state
resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C; see Figure 13 and
12
- 1.7 2 mΩ
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source avalanche
energy
ID = 100 A; Vsup ≤ 40 V;
RGS = 50 Ω; VGS = 10 V;
Tj(init) = 25 °C; inductive load
type unclamped inductive load
- - 1.2 J
[1] Continuous current is limited by package.
[2] Refer to document 9397 750 12572 for further information.
1 page  
NXP Semiconductors
BUK762R0-40C
N-channel TrenchMOS standard level FET
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter
Conditions
Min Typ Max Unit
Rth(j-a)
thermal resistance
from junction to
ambient
mounted on a printed-circuit
board; minimum footprint; vertical
in still air
-
50 -
K/W
Rth(j-mb)
thermal resistance
from junction to
mounting base
see Figure 5
- - 0.45 K/W
1
Zth(j-mb)
(K/W) δ = 0.5
10−1
10−2
0.2
0.1
0.05
0.02
single shot
10−3
10−6
10−5
10−4
10−3
10−2
003aab020
P
tp
δ=
T
10−1
tp
T
tp (s)
t
1
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
6. Characteristics
Table 6. Characteristics
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGSth
drain-source
breakdown voltage
gate-source threshold
voltage
ID = 0.25 mA; VGS = 0 V;
Tj = 25 °C
ID = 0.25 mA; VGS = 0 V;
Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 10
ID = 1 mA; VDS = VGS;
Tj = -55 °C; see Figure 11
ID = 1 mA; VDS = VGS;
Tj = 175 °C; see Figure 11
IDSS drain leakage current VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 40 V; VGS = 0 V;
Tj = 175 °C
Min
40
36
2
-
1
-
-
BUK762R0-40C_2
Product data sheet
Rev. 02 — 20 August 2007
Typ
-
-
3
-
-
0.02
-
Max Unit
-V
-V
4V
4.4 V
-V
1 μA
500 μA
© NXP B.V. 2007. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
7. Package outline
BUK762R0-40C
N-channel TrenchMOS standard level FET
Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)
SOT404
D1
D
HD
E
2
13
ee
b
A
A1
mounting
base
Lp
c
Q
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT A A1 b
D
c max. D1
mm 4.50 1.40 0.85 0.64 11 1.60
4.10 1.27 0.60 0.46
1.20
E
10.30
9.70
e
2.54
Lp HD Q
2.90 15.80 2.60
2.10 14.80 2.20
OUTLINE
VERSION
SOT404
IEC
REFERENCES
JEDEC
JEITA
Fig 17. Package outline SOT404 (D2PAK)
BUK762R0-40C_2
Product data sheet
Rev. 02 — 20 August 2007
EUROPEAN
PROJECTION
ISSUE DATE
05-02-11
06-03-16
© NXP B.V. 2007. All rights reserved.
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