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PDF HCS193K Data sheet ( Hoja de datos )

Número de pieza HCS193K
Descripción Radiation Hardened Synchronous 4-Bit Up/Down Counter
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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No Preview Available ! HCS193K Hoja de datos, Descripción, Manual

HCS193MS
September 1995
Radiation Hardened
Synchronous 4-Bit Up/Down Counter
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
P1 1
Q1 2
Q0 3
CPD 4
CPU 5
Q2 6
Q3 7
GND 8
16 VCC
15 P0
14 MR
13 TCD
12 TCU
11 PL
10 P2
9 P3
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.30% VCC Max
- VIH = 0.70% VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS193MS is a Radiation Hardened 4-bit binary UP/
DOWN synchronous counter.
Presetting the counter to the number on the preset data inputs
(P0 - P3) is accomplished by a low on the asynchronous parallel
load input (PL). The counter is incremented on the low to high
transition of the clock-up input (high on the clock-down),
decremented on the low to high transition of the clock-down input
(high on the clock-up). A high level on the MR input overrides any
other input to clear the counter to zero. The Terminal Count Up
goes low half a clock period before the zero count is reached and
returns high at the maximum count.
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
P1
Q1
Q0
CPD
CPU
Q2
Q3
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
P0
MR
TCD
TCU
PL
P2
P3
The HCS193MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
Ordering Information
PART NUMBER
HCS193DMSR
HCS193KMSR
HCS193D/Sample
HCS193K/Sample
HCS193HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
270
Spec Number 518759
File Number 3065.1

1 page




HCS193K pdf
Specifications HCS193MS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
Pulse Width CPU to CPD
SYMBOL
TW
(NOTE 1)
CONDITIONS
VCC = 4.5V
Pulse Width PL
TW VCC = 4.5V
Pulse Width MR
TW VCC = 4.5V
Recovery Time PL to CPU, CPD
TREC VCC = 4.5V
Recovery Time MR to CPU, CPD
TREC VCC = 4.5V
TEMPERATURE
+25oC
+125oC
+25oC
+125oC
+25oC
+125oC
+25oC
+125oC
+25oC
+125oC
LIMITS
MIN MAX
20 -
30 -
16 -
24 -
20 -
30 -
16 -
24 -
5-
5-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Noise Immunity
Functional Test
CPU to Qn
CPD to Qn
CPU TO TCU
CPD TO TCD
PL to Qn
MR to Qn
SYMBOL
ICC
IOL
IOH
VOL
VOH
IIN
FN
TPLH
TPHL
TPLH
TPHL
TPHL,
TPLH
TPHL,
TPLH
TPLH
TPHL
TPHL
(NOTES 1, 2)
CONDITIONS
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
VCC = 4.5V or 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
VCC = 5.5V, VIN = VCC or GND
VCC = 4.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), (Note 3)
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
TEMPERATURE
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
+25oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
3. For functional tests VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
200K RAD
LIMITS
MIN MAX
- 0.75
4.0 -
-4.0 -
- 0.1
VCC
-0.1
-
-
-
±5
-
2 38
2 36
2 39
2 37
2 27
2 27
2 31
2 40
2 38
UNITS
mA
mA
mA
V
V
µA
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
Spec Number 518759
274

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