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Número de pieza | HCS374K | |
Descripción | Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered | |
Fabricantes | Intersil Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HCS374K (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! HCS374MS
September 1995
Radiation Hardened Octal D-Type
Flip-Flop, Three-State, Positive Edge Triggered
Features
Pinouts
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.3 VCC Max
- VIH = 0.7 VCC Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
20 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T20
TOP VIEW
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
Description
The Intersil HCS374MS is a Radiation Hardened non-inverting
octal D-type, positive edge triggered flip-flop with three-stateable
outputs. The HCS374MS utilizes advanced CMOS/SOS technol-
ogy. The eight flip-flops enter data into their registers on the
LOW-to-HIGH transition of the clock (CP). Data is also
transferred to the outputs during this transition. The output
enable (OE) controls the three-state outputs and is independent
of the register operation. When the output enable is high, the out-
puts are in the high impedance state.
The HCS374MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS374MS is supplied in a 20 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
20 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F20
TOP VIEW
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Ordering Information
PART NUMBER
HCS374DMSR
HCS374KMSR
HCS374D/Sample
HCS374K/Sample
HCS374HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
358
PACKAGE
20 Lead SBDIP
20 Lead Ceramic Flatpack
20 Lead SBDIP
20 Lead Ceramic Flatpack
Die
Spec Number 518770
File Number 2470.2
1 page Specifications HCS374MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
Clock to Q
Enable to Output
Disable to Output
SYMBOL
(NOTES 1, 2)
CONDITIONS
ICC VCC = 5.5V, VIN = VCC or GND
IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VOL
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOL = 50µA
VOH
VCC = 4.5V and 5.5V, VIH = 0.70(VCC),
VIL = 0.30(VCC), IOH = -50µA
IIN VCC = 5.5V, VIN = VCC or GND
IOZ Applied Voltage = 0V or VCC, VCC = 5.5V
FN
TPLH,
TPHL
TPZL,
TPZH
TPLZ
TPHZ
VCC = 4.5V, VIH = 0.70(VCC),
VIL =0.30(VCC), (Note 3)
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
VCC = 4.5V
TEMPERATURE
+25oC
+25oC
200K RAD
LIMITS
MIN MAX UNITS
- 0.75 mA
6.0 - mA
+25oC
-6.0 - mA
+25oC
- 0.1 V
+25oC
+25oC
+25oC
VCC
-0.1
-
-
-
±5
±50
V
µA
µA
+25oC
---
+25oC
2 26 ns
+25oC
2 23
+25oC
+25oC
2 23 ns
2 20 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
IOZL/IOZH
5 ±200nA
Spec Number 518770
362
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet HCS374K.PDF ] |
Número de pieza | Descripción | Fabricantes |
HCS374D | Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered | Intersil Corporation |
HCS374DMSR | Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered | Intersil Corporation |
HCS374HMSR | Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered | Intersil Corporation |
HCS374K | Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered | Intersil Corporation |
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