HCTS161AHMSR Datasheet PDF - Intersil Corporation
| Part Number | HCTS161AHMSR | |
| Description | Radiation Hardened Synchronous Counter | |
| Manufacturers | Intersil Corporation | |
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HCTS161AMS
September 1995
Radiation Hardened
Synchronous Counter
Features
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• Minimum LET for SEU Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
-VIL = 0.8V Max
-VIH = VCC/2V Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
MR 1
CP 2
P0 3
P1 4
P2 5
P3 6
PE 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9 SPE
Description
The Intersil HCTS161AMS high-reliability high-speed presettable
four-bit binary synchronous counter features asynchronous reset
and look-ahead carry logic. The HCTS161AMS has an active-low
master reset to zero, MR. A low level at the synchronous parallel
enable, SPE, disables counting and allows data at the preset
inputs (P0 - P3) to load the counter. The data is latched to the
outputs on the positive edge of the clock input, CP. The
HCTS161AMS has two count enable pins, PE and TE. TE also
controls the terminal count output, TC. The terminal count output
indicates a maximum count for one clock pulse and is used to
enable the next cascaded stage to count.
The HCTS161AMS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS161AMS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
MR
CP
P0
P1
P2
P3
PE
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
Ordering Information
PART NUMBER
HCTS161ADMSR
HCTS161AKMSR
HCTS161AD/Sample
HCTS161AK/Sample
HCTS161AHMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518888
File Number 2144.2
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Specifications HCTS161AMS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
GROUP A SUBGROUPS
READ AND RECORD
Initial Test (Preburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test I (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
Interim Test II (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Interim Test III (Postburn-In)
100%/5004
1, 7, 9
ICC, IOL/H
PDA
100%/5004
1, 7, 9, Deltas
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Group A (Note 1)
Sample/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6
Sample/5005
1, 7, 9
Group D
Sample/5005
1, 7, 9
NOTE:
1. Alternate group A testing in accordance with method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS
METHOD
TEST
PRE RAD
POST RAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
READ AND RECORD
PRE RAD
POST RAD
1, 9 Table 4 (Note 1)
Spec Number 518888
5
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