PDF HCTS299MS Data sheet ( Hoja de datos )

Número de pieza	HCTS299MS
Descripción	Radiation Hardened 8-Bit Universal Shift Register; Three-State
Fabricantes	Intersil Corporation
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No Preview Available ! HCTS299MS August 1995 Radiation Hardened 8-Bit Universal Shift Register; Three-State Features Pinouts • 3 Micron Radiation Hardened CMOS SOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Fanout (Over Temperature Range) -Bus Driver Outputs: 15 LSTTL Loads • Military Temperature Range: -55oC to +125oC • Signiﬁcant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • LSTTL Input Compatibility -VIL = 0.8V Max -VIH = VCC/2 Min • Input Current Levels Ii ≤ 5µA at VOL, VOH 20 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T20 TOP VIEW S0 1 OE1 2 OE2 3 I/O6 4 I/O4 5 I/O2 6 I/O0 7 Q0 8 MR 9 GND 10 20 VCC 19 S1 18 DS7 17 Q7 16 I/O7 15 I/O5 14 I/O3 13 I/O1 12 CP 11 DS0 Description The Intersil HCTS299MS is a Radiation Hardened 8-bit shift/ storage register with three-state bus interface capability. The register has four synchronous operating modes controlled by the two select inputs (S0, S1). The mode select, the serial data (DS0, DS7) and the parallel data (IO0 - IO7) respond only to the low to high transition of the clock (CP) pulse. S0, S1 and the data inputs must be one set up time period prior to the clocks positive transition. The master reset (MR) is an asynchronous active low input. The HCTS299MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family with TTL input compatibility. S0 OE1 OE2 I/O6 I/O4 I/O2 I/O0 Q0 MR GND 20 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F20 TOP VIEW 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC S1 DS7 Q7 I/O7 I/O5 I/O3 I/O1 CP DS0 Ordering Information PART NUMBER HCTS299DMSR HCTS299KMSR HCTS299D/Sample HCTS299K/Sample HCTS299HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 \| Copyright © Intersil Corporation 1999 624 PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die Spec Number 518640 File Number 3069.1 1 page Speciﬁcations HCTS299MS TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER CLK to I/On SYMBOL (NOTES 1, 2) CONDITIONS TPHL, TPLH VCC = 4.5V CLK to Q0, Q7 TPHL, TPLH VCC = 4.5V MR to Output TPHL VCC = 4.5V OEn to Output TPZH VCC = 4.5V TPHZ TPZL TPLZ GROUP A SUB- GROUPS 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. LIMITS MIN MAX UNITS 2 28 ns 2 32 ns 2 30 ns 2 34 ns 2 32 ns 2 36 ns 2 23 ns 2 25 ns 2 25 ns 2 27 ns 2 30 ns 2 34 ns 2 30 ns 2 34 ns TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER Capacitance Power Dissipation SYMBOL CONDITIONS CPD VCC = 5.0V, f = 1MHz Input Capacitance CIN VCC = 5.0V, f = 1MHz Output Transition Time Max Operating Frequency Setup Time DS0, DS7, I/On to CLK TTHL, TTLH VCC = 4.5V FMAX VCC = 4.5V TSU VCC = 4.5V NOTES 1 1 1 1 1 1 1 1 1 1 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC LIMITS MIN MAX UNITS - 147 pF - 171 pF - 10 pF - 10 pF - 15 ns - 22 ns - 25 MHz - 16 MHz 20 - ns 30 - ns Spec Number 518640 628 5 Page HCTS299MS Three-State Low Timing Diagrams VIH VIL VOZ VOL VS INPUT TPZL VT TPLZ OUTPUT VW Three-State LOW VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VT 1.30 V VW 0.90 V VIL 0 V GND 0V Three-State Low Load Circuit VCC DUT RL TEST POINT CL CL = 50pF RL = 500Ω Three-State High Timing Diagrams VIH VIL VOH VOZ VS INPUT TPZH VT TPHZ OUTPUT VW Three-State High Load Circuit DUT TEST POINT RL CL = 50pF RL = 500Ω Three-State HIGH VOLTAGE LEVELS PARAMETER HCTS UNITS VCC 4.50 V VIH 3.00 V VS 1.30 V VT 1.30 V VW 3.60 V VIL 0 V GND 0V 634 Spec Number 518640 11 Page

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