|
|
PDF ISL6228 Data sheet ( Hoja de datos )
| Número de pieza | ISL6228 | |
| Descripción | High-Performance Dual-Output Buck Controller | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ISL6228 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
|
No Preview Available !
®
Data Sheet
May 7, 2008
ISL6228
FN9095.2
High-Performance Dual-Output Buck
Controller for Notebook Applications
The ISL6228 IC is a dual channel synchronous-buck PWM
controller featuring Intersil's Robust Ripple Regulator (R3)
technology that delivers truly superior dynamic response to
input voltage and output load transients. Integrated
MOSFET drivers and bootstrap diodes result in fewer
components and smaller implementation area.
Intersil’s R3 technology combines the best features of fixed-
frequency and hysteretic PWMs while eliminating many of
their shortcomings. R3 technology employs an innovative
modulator that synthesizes an AC ripple voltage signal VR,
analogous to the output inductor ripple current. The AC signal
VR enters a window comparator where the lower threshold is
the error amplifier output VCOMP, and the upper threshold is a
programmable voltage reference VW, resulting in generation
of the PWM signal. The voltage reference VW sets the
steady-state PWM frequency. Both edges of the PWM can be
modulated in response to input voltage transients and output
load transients, much faster than conventional fixed-
frequency PWM controllers. Unlike a conventional hysteretic
converter, each channel of the ISL6228 has an error amplifier
that provides ±1% voltage regulation at the FB pin.
The ISL6228 has a 1.5ms digital soft-start and can be
started into a pre-biased output voltage. A resistor divider is
used to program the output voltage setpoint. The ISL6228
operates in continuous-conduction-mode (CCM) in heavy
load, and in diode-emulation-mode (DEM) in light load to
improve light-load efficiency. In CCM, the controller always
operates as a synchronous rectifier. In DEM, the low-side
MOSFET is permitted to stay off, blocking negative current
flow into the low-side MOSFET from the output inductor.
Pinout
ISL6228 (28 LD 4x4 TQFN)
28 27 26 25 24 23 22
FSET2 1
VIN2 2
VCC2 3
VCC1 4
VIN1 5
FSET1 6
PGOOD1 7
GND
21 BOOT2
20 PVCC2
19 LGATE2
18 PGND2
17 PGND1
16 LGATE1
15 PVCC1
8 9 10 11 12 13 14
Features
• High performance R3 technology
• Fast transient response
• ±1% regulation accuracy: -40°C to +100°C
• Individual power stage input rail for each channel
• Wide input voltage range: +3.3V to +25V
• Output voltage range: +0.6V to +5V
• Diode emulation mode for increased light load efficiency
• Programmable PWM frequency: 200kHz to 600kHz
• Pre-biased output start-up capability
• Integrated MOSFET drivers and bootstrap diode
• Internal digital soft-start
• Power good monitor
• Fault protection
- Undervoltage protection
- Soft crowbar overvoltage protection
- Inductor DCR overcurrent protection
- Over-temperature protection
- Fault identification by PGOOD pull-down resistance
• Pb-free (RoHS compliant)
Applications
• General purpose switching buck regulators
• PCI express graphical processing unit
• Auxiliary power rail
• VRM
• Network adaptor
Ordering Information
PART NUMBER PART
TEMP
(Note)
MARKING (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6228HRTZ 6228HRTZ -10 to +100 28 Ld 4x4 TQFN L28.4x4A
ISL6228HRTZ-T* 6228HRTZ -10 to +100 28 Ld 4x4 TQFN L28.4x4A
Tape and Reel
ISL6228IRTZ 6228IRTZ -40 to +100 28 Ld 4x4 TQFN L28.4x4A
ISL6228IRTZ-T* 6228IRTZ -40 to +100 28 Ld 4x4 TQFN L28.4x4A
Tape and Reel
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-
free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet
or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6228
Electrical Specifications
These specifications apply for TA = -40°C to +100°C; All typical specifications TA = +25°C, VCC = 5V,
PVCC = 5V; Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified.
Temperature limits established by characterization and are not production tested. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
ERROR AMPLIFIER
FB Input Bias Current
POWER GOOD
IFB FB = 0.60V
FB = 0.60V TA = -10°C to +100°C
-33 -
-35 -
15 nA
15 nA
PGOOD Pull-Down Impedance
PGOOD Leakage Current
PGOOD Maximum Sink Current (Note 3)
RPG_SS
RPG_SS
RPG_UV
RPG_UV
RPG_OV
RPG_OV
RPG_OC
RPG_OC
IPGOOD
PGOOD = 5mA Sink
PGOOD = 5mA Sink TA = -10°C to +100°C
PGOOD = 5mA Sink
PGOOD = 5mA Sink TA = -10°C to +100°C
PGOOD = 5mA Sink
PGOOD = 5mA Sink TA = -10°C to +100°C
PGOOD = 5mA Sink
PGOOD = 5mA Sink TA = -10°C to +100°C
PGOOD = 5V
70 95 125 Ω
75 95 125 Ω
70 95 125 Ω
75 95 125 Ω
45 63 85 Ω
50 63 85 Ω
22 32 45 Ω
25 32 45 Ω
- 0.1 1.0 µA
- 5.0 - mA
PGOOD Soft-Start Delay
GATE DRIVER
UGATE Pull-Up Resistance (Note 3)
UGATE Source Current (Note 3)
UGATE Sink Resistance (Note 3)
UGATE Sink Current (Note 3)
LGATE Pull-Up Resistance (Note 3)
LGATE Source Current (Note 3)
LGATE Sink Resistance (Note 3)
LGATE Sink Current (Note 3)
UGATE to LGATE Deadtime
LGATE to UGATE Deadtime
BOOTSTRAP DIODE
Forward Voltage
Reverse Leakage
CONTROL INPUTS
EN High Threshold
EN Low Threshold
EN Leakage
PROTECTION
tSS EN High to PGOOD High
RUGPU
IUGSRC
RUGPD
IUGSNK
RLGPU
ILGSRC
RLGPD
ILGSNK
tUGFLGR
tLGFUGR
200mA Source Current
UGATE - PHASE = 2.5V
250mA Sink Current
UGATE - PHASE = 2.5V
250mA Source Current
LGATE - PGND = 2.5V
250mA Sink Current
LGATE - PGND = 2.5V
UGATE falling to LGATE rising, no load
LGATE falling to UGATE rising, no load
VF PVCC = 5V, IF = 2mA
IR VR = 25V
VENTHR
VENTHF
IENL
IENH
EN = 0V
EN = 5.0V
EN = 5.0V TA = -10°C to +100°C
2.20 2.75 3.50 ms
-
1.0 1.5
Ω
- 2.0 -
A
-
1.0 1.5
Ω
- 2.0 -
A
-
1.0 1.5
Ω
- 2.0 -
A
-
0.5 0.9
Ω
- 4.0 -
A
- 21 - ns
- 21 - ns
- 0.58 -
- 0.2 -
V
µA
2.0 -
-V
- - 1.0 V
- 0.1 1.0 µA
1.4 2 2.5 µA
1.5 2 2.5 µA
OCSET-VO Threshold
OCSET 10µA Current Source
VOCSETTHR
IOCSET EN = 5V
EN = 5V TA = -10°C to +100°C
EN = 0V
OCSET 10µA Current Source Impedance ROCSETIMP EN = 5V, OCSET = 1.2V
UVP Threshold
VUV
OVP Rising Threshold
VOVR
OVP Falling Threshold
VOVF
-1.75 0
1.75 mV
8.8 10 10.5 µA
9 10 10.5 µA
- 0 - µA
- 600 - kΩ
81 86 87 %
113 116 120
%
100 102 106
%
5 FN9095.2
May 7, 2008
5 Page 
ISL6228
Programming the PWM Switching Frequency
The ISL6228 does not use a clock signal to produce PWMs.
The PWM switching frequency fSW is programmed by the
resistor RFSET that is connected from the FSET pin to the
GND pin. The approximate PWM switching frequency is
written as Equation 10:
fSW
=
-------------1--------------
K ⋅ RFSET
(EQ. 10)
Estimating the value of RFSET is written as Equation 11:
RFSET
=
--------1---------
K • fSW
(EQ. 11)
Where:
- fSW is the PWM switching frequency
- RFSET is the fSW programming resistor
- K = 1.5 x 10-10
It is recommended that whenever the control loop
compensation network is modified, fSW should be checked
for the correct frequency and if necessary, adjust RFSET.
Compensation Design
Figure 6 shows the recommended Type-II compensation
circuit. The FB pin is the inverting input of the error amplifier.
The COMP signal, the output of the error amplifier, is inside the
chip and unavailable to users. CINT is a 100pF capacitor
integrated inside the IC, connecting across the FB pin and the
COMP signal. RTOP, RFB, CFB and CINT form the Type-II
compensator. The frequency domain transfer function is given
by Equation 12:
GCOMP(s)
=
-----------1-----+-----s----•--(---R----T----O-----P-----+----R-----F----B----)--•---C-----F---B-------------
s • RTOP • CINT • (1 + s • RFB • CFB)
(EQ. 12)
CINT = 100pF
RFB
CFB
COMP
-
EA
FB
+
RTOP
RBOTTOM
VO
REF
ISL6228
FIGURE 6. COMPENSATION REFERENCE CIRCUIT
The LC output filter has a double pole at its resonant frequency
that causes rapid phase change. The R3 modulator used in the
ISL6228 makes the LC output filter resemble a first order
system in which the closed loop stability can be achieved with
the recommended Type-II compensation network. Intersil
provides a PC-based tool (example page is shown later) that
can be used to calculate compensation network component
values and help simulate the loop frequency response.
General Application Design Guide
This design guide is intended to provide a high-level
explanation of the steps necessary to design a single-phase
power converter. It is assumed that the reader is familiar with
many of the basic skills and techniques referenced in the
following section. In addition to this guide, Intersil provides
complete reference designs that include schematics, bills of
materials, and example board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is written as
Equation 13:
D
=
-V-----O---
VIN
(EQ. 13)
The output inductor peak-to-peak ripple current is written as
Equation 14:
IPP
=
V-----O-----•--(---1-----–----D-----)
fSW • L
(EQ. 14)
A typical step-down DC/DC converter will have an IP-P of
20% to 40% of the maximum DC output load current. The
value of IPP is selected based upon several criteria such as
MOSFET switching loss, inductor core loss, and the resistive
loss of the inductor winding. The DC copper loss of the
inductor can be estimated by Equation 15:
PCOPPER = ILOAD2 • DCR
(EQ. 15)
Where ILOAD is the converter output DC current.
The copper loss can be significant so attention has to be
given to the DCR selection. Another factor to consider when
choosing the inductor is its saturation characteristics at
elevated temperature. A saturated inductor could cause
destruction of circuit components, as well as nuisance OCP
faults.
A DC/DC buck regulator must have output capacitance CO
into which ripple current IP-P can flow. Current IPP develops
a corresponding ripple voltage VP-P across CO, which is the
sum of the voltage drop across the capacitor ESR and of the
voltage change stemming from charge moved in and out of
the capacitor. These two voltages are written as
Equation 16:
ΔVESR = IP-P • ESR
(EQ. 16)
and Equation 17:
ΔVC
=
----------I--P-------P-----------
8 • CO • fSW
(EQ. 17)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled
to reduce the total ESR until the required VP-P is achieved.
The inductance of the capacitor can cause a brief voltage dip
if the load transient has an extremely high slew rate. Low
inductance capacitors should be considered. A capacitor
11 FN9095.2
May 7, 2008
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ISL6228.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ISL6223 | Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller | Intersil Corporation |
| ISL6224 | Single Output Mobile-Friendly PWM Controller | Intersil Corporation |
| ISL6225 | Dual Mobile-Friendly PWM Controller with DDR Memory Option | Intersil Corporation |
| ISL6226 | Advanced PWM and Linear Power Controller for Portable Applications | Intersil Corporation |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |