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PDF HCTS374K Data sheet ( Hoja de datos )

Número de pieza HCTS374K
Descripción Radiation Hardened Octal D-Type Flip-Flop/ Three-State/ Positive Edge Triggered
Fabricantes Intersil Corporation　
Logotipo Intersil Corporation Logotipo



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No Preview Available ! HCTS374K Hoja de datos, Descripción, Manual

HCTS393MS
August 1995
Radiation Hardened
Dual 4-Stage Binary Counter
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
- Standard Outputs: 10 LSTTL Loads
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS393MS is a Radiation Hardened 4-stage
riple-carry binary counter. All counter stages are master-
slave flip-flop. The state of the stage advances one count on
the negative transition of each clock pulse. A high voltage
level on the MR line resets all counters to their zero state. All
inputs and outputs are buffered.
The HCTS393MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14
TOP VIEW
CP 1 1
MR 1 2
Q0 1 3
Q1 1 4
Q2 1 5
Q3 1 6
GND 7
14 VCC
13 2 CP
12 2 MR
11 2 Q0
10 2 Q1
9 2 Q2
8 2 Q3
CP 1
MR 1
Q0 1
Q1 1
Q2 1
Q3 1
GND
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14
TOP VIEW
1 14
2 13
3 12
4 11
5 10
69
78
The HCTS393MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
VCC
2 CP
2 MR
2 Q0
2 Q1
2 Q2
2 Q3
Ordering Information
PART NUMBER
HCTS393DMSR
HCTS393KMSR
HCTS393D/Sample
HCTS393K/Sample
HCTS393HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
672
Spec Number 518633
File Number 3071.1

1 page




HCTS374K pdf
Specifications HCTS393MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
Quiescent Current
Output Current (Sink)
Output Current
(Source)
Output Voltage Low
Output Voltage High
Input Leakage Current
Noise Immunity
Functional Test
CPn to Q0
CPn to Q1
CPn to Q2
CPn to Q3
MR to Qn
SYMBOL
(NOTES 1, 2)
CONDITIONS
ICC VCC = 5.5V, VIN = VCC or GND
IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V
IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V
VOL
VCC = 4.5V and 5.5V,
VIH = VCC/2, VIL = 0.8V, IOL = 50µA
VOH
VCC = 4.5V and 5.5V,
VIH = VCC/2, VIL = 0.8V, IOH = -50µA
IIN VCC = 5.5V, VIN = VCC or GND
FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3)
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL VCC = 4.5V
TEMPERATURE
+25oC
+25oC
200K RAD
LIMITS
MIN MAX UNITS
- 0.75 mA
4.0 - mA
+25oC
-4.0 - mA
+25oC
- 0.1 V
+25oC
+25oC
+25oC
VCC
-0.1
-
-
-
±5
-
V
µA
-
+25oC
2 34 ns
+25oC
2 43 ns
+25oC
2 52 ns
+25oC
2 59 ns
+25oC
2 34 ns
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
3. For functional tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 12µA
IOL/IOH
5 -15% of 0 Hour
Spec Number 518633
676

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