CEM4559 PDF даташит
Спецификация CEM4559 изготовлена «Chino-Excel Technology» и имеет функцию, называемую «Dual Enhancement Mode Field Effect Transistor». |
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Детали детали
Номер произв | CEM4559 |
Описание | Dual Enhancement Mode Field Effect Transistor |
Производители | Chino-Excel Technology |
логотип |
7 Pages
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CEM4559
Dual Enhancement Mode Field Effect Transistor (N and P Channel)
FEATURES
60V, 4.5A, RDS(ON) = 55mΩ @VGS = 10V.
RDS(ON) = 75mΩ @VGS = 4.5V.
-60V, -3.5A, RDS(ON) = 105mΩ @VGS = -10V.
RDS(ON) = 160mΩ @VGS = -4.5V.
Super high dense cell design for extremely low RDS(ON).
High power and current handing capability.
Lead free product is acquired.
Surface mount Package.
D1 D1 D2 D2
87 65
5
SO-8
1
1234
S1 G1 S2 G2
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted
Parameter
Symbol
N-Channel
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
Drain Current-Pulsed a
VDS 60
VGS ±20
ID 4.5
IDM 20
P-Channel
-60
±20
-3.5
-20
Maximum Power Dissipation
PD 2.0
Operating and Store Temperature Range
TJ,Tstg
-55 to 150
Units
V
V
A
A
W
C
Thermal Characteristics
Parameter
Thermal Resistance, Junction-to-Ambient b
Symbol
RθJA
Limit
62.5
Units
C/W
2004.June
5 - 85
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CEM4559
N-Channel Electrical Characteristics TA = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Min Typ Max Units
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics c
BVDSS
IDSS
IGSSF
IGSSR
VGS = 0V, ID = 250µA
VDS = 48V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
60
1
100
-100
V
µA
nA
nA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forwand Transconductance
Dynamic Characteristics d
VGS(th)
RDS(on)
gFS
VGS = VDS, ID = 250µA
VGS = 10V, ID = 4.5A
VGS = 4.5V, ID = 4.0A
VDS = 10V, ID = 4.5A
1
3V
42 55 mΩ
55 75 mΩ
8S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics d
Ciss
Coss
VDS = 25V, VGS = 0V,
f = 1.0 MHz
890
173
pF
pF
Crss 22 pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
td(on)
tr
td(off)
VDD = 30V, ID = 1A,
VGS = 10V, RGEN = 6Ω
Turn-On Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS = 30V, ID = 4.5A,
VGS = 10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
Drain-Source Diode Forward Voltage c
IS
VSD
VGS = 0V, IS = 1.3A
11 25 ns
8 18 ns
34 65 ns
9 22 ns
19 24 nC
2.8 nC
3.6 nC
1.3 A
1.2 V
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
5 - 86
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CEM4559
P-Channel Electrical Characteristics TA = 25 C unless otherwise noted
Parameter
Symbol
Test Condition
Min Typ Max Units
Off Characteristics
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
On Characteristics c
BVDSS
IDSS
IGSSF
IGSSR
VGS = 0V, ID = -250µA
VDS = -48V, VGS = 0V
VGS = 20V, VDS = 0V
VGS = -20V, VDS = 0V
-60
-1
100
-100
V
µA
nA
nA
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forwand Transconductance
Dynamic Characteristics d
VGS(th)
RDS(on)
gFS
VGS = VDS, ID = -250µA
VGS = -10V, ID = -3.5A
VGS = -4.5V, ID = -3.1A
VDS = -5V, ID = -3.5A
-1
-3 V
88 105 mΩ
130 160 mΩ
7S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching Characteristics d
Ciss
Coss
Crss
VDS = -30V, VGS = 0V,
f = 1.0 MHz
780
170
49
pF
pF
pF
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
td(on)
tr
td(off)
VDD = -30V, ID = -1A,
VGS = -10V, RGEN = 6Ω
Turn-On Fall Time
tf
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Qg
Qgs
VDS = -30V, ID = -3.5A,
VGS = -10V
Qgd
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
Drain-Source Diode Forward Voltage c
IS
VSD
VGS = 0V, IS = -1.3A
13 45 ns
9 30 ns
48 150 ns
22 75 ns
21 29 nC
3 nC
4 nC
-1.3 A
-1.2 V
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
5
5 - 87
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CEM4559 | Dual Enhancement Mode Field Effect Transistor | Chino-Excel Technology |
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