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PDF NL204153BM21-01A Data sheet ( Hoja de datos )

Número de pieza NL204153BM21-01A
Descripción TFT MONOCHROME LCD MODULE
Fabricantes NEC 
Logotipo NEC Logotipo



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TFT MONOCHROME LCD MODULE
NL204153BM21-01
NL204153BM21-01A
54cm (21.3 Type)
QXGA
LVDS Interface (4 ports)
DATA SHEET
DOD-PD-1318 (4th edition)
This DATA SHEET is updated document from
DOD-PD-0884(3).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-1318 (4th edition)
Published date: February 2006 CP(N)
1 ¤ NEC LCD Technologies, Ltd.
2004-2006 All rights reserved.

1 page




NL204153BM21-01A pdf
NL204153BM21-01/01A
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display grayscale
Pixel
Pixel arrangement
Sub-pixel pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Response time
Luminance
White chromaticity
Signal system
433.152 (H) u 324.864 (V) mm
54 cm (21.3 inches)
a-Si TFT active matrix
256 gray scales per 1 sub-pixel (8-bit)
(766 gray scales per 1 pixel)
2,048 (H) u 1,536 (V) pixels (1 pixel consists of 3 sub-pixels (LCR).)
LCR vertical stripe
0.0705 (H) u 0.2115 (V) mm
0.2115 (H) u 0.2115 (V) mm
457.0 (W) u 350.0 (H) u 25.0 (D) mm (typ.)
3,800 g (typ.)
700:1 (typ.)
At the contrast ratio t 10:1
x Horizontal: Right side 85q (typ.), Left side 85q (typ.)
x Vertical: Up side 85q (typ.), Down side 85q (typ.)
Viewing angle with optimum grayscale (J=DICOM): Normal axis
(perpendicular) Note1
Antiglare
2H (min.) [by JIS K5400]
Ton+Toff (10%mo 90%)
35 ms (typ.)
At IBL= 6.0mArms / lamp
800 cd/m2 (typ.)
NL204153BM21-01
Wx, Wy = (0.255, 0.310) (typ.)
NL204153BM21-01A
Wx, Wy = (0.280, 0.304) (typ.)
4 ports LVDS interface (THC63LVD824u2 pcs, THine Electronics, Inc. or
equivalent)
>LCR 8-bit signals, Data enable signal (DE), Dot clock (CLK)@
Power supply voltage
Backlight
LCD panel signal processing board: 12.0V
Edge light type: 6 cold cathode fluorescent lamps (without inverter)
Replaceable part
x Backlight unit: Type No. 213LHS06 for NL204153BM21-01
213LHS11 for NL204153BM21-01A
Power consumption
At IBL= 6.0mArms/lamp, Checkered flag pattern
34.2 W (typ., Power dissipation of the inverter is not included.)
Note1: When the product luminance is 800cd/m2, the gamma characteristic is designed to J=DICOM.
DATA SHEET DOD-PD-1318 (4th edition)
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NL204153BM21-01A arduino
4.4 POWER SUPPLY VOLTAGE SEQUENCE
NL204153BM21-01/01A
VDD ON
VDD OFF
VDD
Note1
10.8V
0V
5ms < Tr < 80ms
9.6V 10.8V
VDD dip < 20ms
LVDS Signals *1,*2
Note2
0V
CS, SCLK, SDAT
Note2
0V
VALID period
tt20ms Note3
VALID period
VDD ON
10.8V
Toff > 50ms
10ms < t < 35ms
10ms < t < 35ms
0ms < t < 35ms
*1: DA0+/-, DA1+/-, DA2+/-, DA3+/-, CKA+/-, DB0+/-, DB1+/-, DB2+/-, DB3+/-, CKB+/-,
DC0+/-, DC1+/-, DC2+/-, DC3+/-, CKC+/-, DD0+/-, DD1+/-, DD2+/-, DD3+/-, CKD+/-
*2: LVDS signals should be measured at the terminal of 100: resistance.
Note1: In terms of voltage variation (voltage drop) while VDD rising edge is below 10.8V, a protection
circuit may work, and then this product may not work.
Note2: LVDS signals and CS, SCLK, SDAT must be Low or High-impedance, exclude the VALID
period (See above sequence diagram), in order to avoid that internal circuits is damaged.
If some of signals are cut while this product is working, even if the signal input to it once again,
it might not work normally. VDD should be cut when the display and function signals are
stopped.
Note3: At the beginning of the serial communication mode, take 20ms or more after the LVDS signal
input. When writing the LUT data, see “4.12 TEN-bit LOOK UP TABLE FOR GAMMA
ADJUSTMENT”.
Note4: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
DATA SHEET DOD-PD-1318 (4th edition)
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