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CH7308A-TF-TR PDF даташит

Спецификация CH7308A-TF-TR изготовлена ​​​​«Chrontel» и имеет функцию, называемую «LVDS Transmitter».

Детали детали

Номер произв CH7308A-TF-TR
Описание LVDS Transmitter
Производители Chrontel
логотип Chrontel логотип 

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CH7308A-TF-TR Даташит, Описание, Даташиты
Chrontel
CH7308
CH7308 SDVO1 LVDS Transmitter
Features
General Description
Single/Dual LVDS Transmitter up to 140Mpixels/s
(CH7308A)
Single/Dual LVDS Transmitter up to 165Mpixels/s
(CH7308B)
Support resolutions up to 1600x1200 (1920x1200
with reduced blanking)
LVDS low jitter PLL accepts spread spectrum input
LVDS 18-bit and 24-bit outputs
2D dither engine
Panel protection and power sequencing
High-speed SDVO1 serial (1G~2Gbps) AC-coupled
differential RGB inputs
Low voltage interface support to graphics device
Programmable power management
Fully programmable through serial port
Configuration through OpCodes1
Complete Windows driver support
Boundary scan support
Offered in a 64-pin LQFP package
1Intel Proprietary
The CH7308 is a display controller device, which accepts
digital graphics input signals, upscales, encodes, and transmits
data through an LVDS transmitter to a LCD panel. This
device accepts one channel of RGB data over three pairs of
serial data ports.
The LVDS Transmitter includes a low jitter PLL to generate a
high frequency serialized clock and all circuitry required to
upscale, encode, serialize and transmit data. The CH7308A
supports a maximum single channel pixel rate of 140MP/s
while the CH7308B supports a maximum pixel rate of
165MP/s. The minimum dual channel pixel rate is 100MP/s.
The LVDS transmitter includes a panel fitting up-scaler and a
programmable dither function to support 18-bit LCD panels.
Data is encoded into commonly used formats, including those
specified in the OpenLDI and SPWG specifications.
Serialized data is outputted on three to eight differential
channels.
RESET*
AS
SPC
SPD
SDVO_CLK(+/-)
SDVO_R(+/-)
SDVO_G(+/-)
SDVO_B(+/-)
Serial Port/
Power
Control
Clock Driver
Data Latch,
Serial To
Parallel
STALL(+/-) Generator/
Power Sequencing
SDVO
Character
Decoder
Up-Scaler
XTAL
SC_PROM
SD_PROM
SC_DDC
SD_DDC
SDVO_STALL(+/-)
ENAVDD
ENABKL
XI/FIN, XO
Dither
LVDS PLL
LVDS
Encoder
FIFO
LVDS
Serializer
LVDS
Driver
Figure 1: Functional Block Diagram
LDC[3:0],LDC*[3:0]
LL1C,LL1C*
LDC[7:4],LDC*[7:4]
LL2C,LL2C*
VSWING
201-0000-064 Rev. 2.3, 9/22/2008
1









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CH7308A-TF-TR Даташит, Описание, Даташиты
CHRONTEL
CH7308
Table of Contents
1.0 Pin Assignment ............................................................................................................................. 3
1.1 Package Diagram .......................................................................................................................................3
1.2 Pin Description ..........................................................................................................................................4
2.0 Functional Description................................................................................................................. 6
2.1 Input Interface............................................................................................................................................6
2.2 Automatic Panel-Fitting.............................................................................................................................8
2.3 Emission Reduction Clock.........................................................................................................................9
2.4 Dithering ....................................................................................................................................................9
2.5 Power Sequencing .....................................................................................................................................9
2.6 Panel Protection .......................................................................................................................................10
2.7 Command Interface .................................................................................................................................10
3.0 Register Control.......................................................................................................................... 13
4.0 Electrical Specifications ............................................................................................................. 13
4.1 Absolute Maximum Ratings ....................................................................................................................13
4.2 Recommended Operating Conditions ......................................................................................................13
4.3 Electrical Characteristics .........................................................................................................................14
4.4 DC Specifications ....................................................................................................................................14
4.5 AC Specifications ....................................................................................................................................16
4.6 LVDS Output Specifications ...................................................................................................................17
4.7 LVDS Output Timing ..............................................................................................................................19
5.0 Package Dimensions ................................................................................................................... 20
6.0 Revision History.......................................................................................................................... 21
2
201-0000-064
Rev. 2.3, 9/22/2008









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CH7308A-TF-TR Даташит, Описание, Даташиты
CHRONTEL
1.0 Pin Assignment
1.1 Package Diagram
CH7308
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
ENAVBKL
ENAVDD
AVDD _PLL
RESET *
AS
SPC
SPD
AGND _PLL
SD _PROM
SC _PROM
SD _DDC
SC _DDC
DGND
XI
XO
DVDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CHRONTEL
CH7308
48 SDVO _STALL -
47 SDVO _STALL +
46 LDC 0*
45 LDC 0
44 LVDD
43 LDC 1*
42 LDC 1
41 LGND
40 LDC 2*
39 LDC 2
38 LVDD
37 LL1C*
36 LL1C
35 LGND
34 LDC 3*
33 LDC 3
Figure 2: 64 Pin LQFP Pin Out (Top View)
201-0000-064 Rev. 2.3, 9/22/2008
3










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CH7308A-TF-TRLVDS TransmitterChrontel
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