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SEU02G64B4BF2SA-xxR PDF даташит

Спецификация SEU02G64B4BF2SA-xxR изготовлена ​​​​«Swissbit» и имеет функцию, называемую «SDRAM unbuffered DIMM».

Детали детали

Номер произв SEU02G64B4BF2SA-xxR
Описание SDRAM unbuffered DIMM
Производители Swissbit
логотип Swissbit логотип 

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SEU02G64B4BF2SA-xxR Даташит, Описание, Даташиты
preliminary Data Sheet
Rev.0.9 17.12.2012
2GB DDR2 SDRAM unbuffered DIMM
240 Pin UDIMM
SEU02G64B4BF2SA-xxR
2GByte in FBGA Technology
RoHS compliant
Options:
Data Rate / Latency
DDR2 800 MT/s CL6
DDR2 667 MT/s CL5
Marking
-25
-30
Module density
2048MB with 16 dies and 2 ranks
Standard Grade (TA)
(TC)
0°C to 70°C
0°C to 85°C
Environmental Requirements:
Operating temperature (ambient)
Standard Grade
0°C to 70°C
Operating Humidity
10% to 90% relative humidity, noncondensing
Operating Pressure
105 to 69 kPa (up to 10000 ft.)
Storage Temperature
-55°C to 100°C
Storage Humidity
5% to 95% relative humidity, noncondensing
Storage Pressure
1682 PSI (up to 5000 ft.) at 50°C
Features:
240-pin 64-bit Dual-In-Line Double Data Rate
synchronous DRAM Module
Module organization: dual rank 256M x 64
VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V
1.8V I/O ( SSTL_18 compatible)
Auto Refresh (CBR) and Self Refresh 8k Refresh
every 64ms
Serial Presence Detect with EEPROM
Gold-contact pads with 30µ” electrolytic gold
This module is fully pin and functional compatible to
the JEDEC PC2-6400 spec. and JEDEC- Standard
MO-237. (see www.jedec.org)
The pcb and all components are manufactured
according to the RoHS compliance specification
[EU Directive 2002/95/EC Restriction of Hazardous
Substances (RoHS)]
DDR2 - SDRAM component SAMSUNG
K4T1G084QF DIE Rev. F
128Mx8 DDR2 SDRAM in FBGA-60 package
4-bit prefetch architecture
DLL to align DQ and DQS transitions with CK
Multiple internal device banks for concurrent operation
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency 1 tCK
Programmable burst length: 4 or 8
Adjustable data-output drive strength
On-die termination (ODT)
Figure: mechanical dimensions1
Swissbit AG
Industiestrasse 4
CH-9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
1if no tolerances specified ± 0.15mm
www.swissbit.com
Page 1
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SEU02G64B4BF2SA-xxR Даташит, Описание, Даташиты
preliminary Data Sheet
Rev.0.9 17.12.2012
This Swissbit module is an industry standard 240-pin 8-byte DDR2 SDRAM Dual-In-line Memory Module
(UDIMM) which is organized as x64 high speed CMOS memory arrays. The module uses internally configured
octal-bank DDR2 SDRAM devices. The module uses double data rate architecture to achieve high-speed
operation. DDR2 SDRAM modules operate from a differential clock (CK and CK#). READ and WRITE accesses
to a DDR2 SDRAM module is burst-oriented; accesses start at a selected location and continue for a
programmed number of locations in a programmed sequence. The burst length is either four or eight locations. An
auto precharge function can be enabled to provide a self-timed row precharge that is initiated at the end of a burst
access. The DDR2 SDRAM devices have a multibank architecture which allows a concurrent operation that is
providing a high effective bandwidth. A self refresh mode is provided and a power-saving “power-down” mode. All
inputs and all full drive-strength outputs are SSTL_18 compatible.
The DDR2 SDRAM module uses the optional serial presence detect (SPD) function implemented via serial
EEPROM using the standard I2C protocol. This nonvolatile storage device contains 256 bytes. The first 128 bytes
are utilized by the DIMM manufacturer (swissbit) to identify the module type, the module’s organization and
several timing parameters. The second 128 bytes are available to the end user.
Module Configuration
Organization
DDR2 SDRAMs used
256M x 64bit 16 x 128M x 8bit (1024Mbit)
Row
Addr.
14
Device Bank
Addr.
BA0, BA1, BA2
Column
Addr.
10
Refresh
8k
Module
Bank Select
S0#, S1#
Module Dimensions
in mm
133.35 (long) x 30(high) x 4.00 [max] (thickness)
Timing Parameters
Part Number
SEU02G64B4BF2SA-25R
SEU02G64B4BF2SA-30R
Module Density
2048 MB
2048 MB
Transfer Rate
6.4 GB/s
5.3 GB/s
Clock Cycle/Data bit rate
2.5ns/800MT/s
3.0ns/667MT/s
Latency
6-6-6
5-5-5
Pin Name
A0-9, A11 A13
A10/AP
BA0 BA2
DQ0 DQ63
DM0-DM7
DQS0 - DQS7
DQS0# - DQS7#
RAS#
CAS#
WE#
CKE0 CKE1
S0#, S1#
CK0 CK2
CK0# - CK2#
Swissbit AG
Industiestrasse 4
CH-9552 Bronschhofen
Address Inputs
Address Input / Autoprecharge Bit
Bank Address Inputs
Data Input / Output
Input Data Mask
Data Strobe, positive line
Data Strobe, negative line (only used when differential data strobe mode is enabled)
Row Address Strobe
Column Address Strobe
Write Enable
Clock Enable
Chip Select
Clock Inputs, positive line
Clock Inputs, negative line
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
Page 2
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SEU02G64B4BF2SA-xxR Даташит, Описание, Даташиты
VDD
VREF
VSS
VDDSPD
SCL
SDA
SA0 SA1
ODT0, ODT1
NC
preliminary Data Sheet
Supply Voltage (1.8V± 0.1V)
Input / Output Reference
Ground
Serial EEPROM Positive Power Supply
Serial Clock for Presence Detect
Serial Data Out for Presence Detect
Presence Detect Address Inputs
On-Die Termination
No Connection
Rev.0.9 17.12.2012
Pin Configuration
PIN #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Front Side
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
NC(RESET#)
NC
VSS
DQ10
DQ11
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
PIN #
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
Back Side
VSS
DQ4
DQ5
VSS
DM0 (DQS9)
NC (DQS9#)
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1 (DQS10)
NC (DQS10#)
VSS
CK1
CK1#
VSS
DQ14
DQ15
VSS
DQ20
DQ21
VSS
DM2 (DQS11)
NC (DQS11#)
VSS
DQ22
DQ23
VSS
DQ28
PIN #
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
Front Side
A4
VDDQ
A2
VDD
VSS
VSS
VDD
NC (Par_In)
VDD
A10/AP
BA0
VDDQ
WE#
CAS#
VDDQ
S1#
ODT1
VDDQ
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DQS5#
PIN #
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
Swissbit AG
Industiestrasse 4
CH-9552 Bronschhofen
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
www.swissbit.com
Back Side
VDDQ
A3
A1
VDD
CK0
CK0#
VDD
A0
VDD
BA1
VDDQ
RAS#
S0#
VDDQ
ODT0
A13
VDD
VSS
DQ36
DQ37
VSS
DM4 (DQS13)
NC (DQS13#)
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DM5 (DQS14)
NC (DQS14#)
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