PDF SEN01G64D1BF1SA-25R Data sheet ( Hoja de datos )

Número de pieza	SEN01G64D1BF1SA-25R
Descripción	SDRAM SO-DIMM
Fabricantes	Swissbit
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No Preview Available ! Data Sheet Rev.1.2 09.11.2010 1GB DDR2 – SDRAM SO-DIMM 200 Pin SO-DIMM SEN01G64D1BF1SA-30R 1GB PC2-6400 in FBGA Technology RoHS compliant Options:  Data Rate / Latency DDR2 800 MT/s CL6 DDR2 667 MT/s CL5 Marking -25 -30  Module density 1024MB with 8 dies and 1 rank  Standard Grade (TA) (TC) Grade E (TA) (TC) Grade W (TA) (TC) 0°C to 70°C 0°C to 85°C 0°C to 85°C 0°C to 95°C -40°C to 85°C -40°C to 95°C * The refresh rate has to be doubled when 85°C>TC>95°C Environmental Requirements:  Operating temperature (ambient) standard Grade 0°C to 70°C Grade E 0°C to 85°C Grade W  Operating Humidity -40°C to 85°C 10% to 90% relative humidity, noncondensing  Operating Pressure 105 to 69 kPa (up to 10000 ft.)  Storage Temperature -55°C to 100°C  Storage Humidity 5% to 95% relative humidity, noncondensing  Storage Pressure 1682 PSI (up to 5000 ft.) at 50°C Features:  200-pin 64-bit Small Outline, Dual-In-Line Double Data Rate Synchronous DRAM Module  Module organization: single rank 128M x 64  VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V  1.8V I/O ( SSTL_18 compatible)  Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms  Serial Presence Detect with EEPROM  Gold-contact pad  This module is fully pin and functional compatible to the JEDEC PC2-6400 spec. and JEDEC- Standard MO-224. (see www.jedec.org)  The pcb and all components are manufactured according to the RoHS compliance specification [EU Directive 2002/95/EC Restriction of Hazardous Substances (RoHS)]  DDR2 - SDRAM component SAMSUNG K4T1G084QF DIE Rev. F  128Mx8 DDR2 SDRAM in FBGA-60 package  Four bit prefetch architecture  DLL to align DQ and DQS transitions with CK  Eight internal device banks for concurrent operation  Programmable CAS latency (CL)  Posted CAS additive latency (AL)  WRITE latency = READ latency – 1 tCK  Programmable burst length: 4 or 8  Adjustable data-output drive strength  On-die termination (ODT) Figure: mechanical dimensions1 Swissbit AG Industriestrasse 4 Ch-9552 Bronschhofen 1if no tolerances specified ± 0.15mm Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 www.swissbit.com eMail: [email protected] Page 1 of 14 1 page Data Sheet Rev.1.2 09.11.2010 FUNCTIONAL BLOCK DIAGRAMM 1024MB DDR2 SDRAM SODIMM, 1 RANK AND 8 COMPONENTS CKE0 ODT0 S0 DQS0 DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1 DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2 DQS2 DM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQS3 DQS3 DM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D0 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D1 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D2 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D3 DQS4 DQS4 DM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQS5 DQS5 DM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQS6 DQS6 DM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQS7 DQS7 DM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D4 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D5 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D6 DQS DQS DM I/O 0 I/O 1 I/O 2 I/O 3 I/O 4 I/O 5 I/O 6 I/O 7 CS ODT CKE D7 BA0-BA2 A0-A13 RAS CAS WE BA0-BA2: SDRAM D0-D7 A0-A13: SDRAM D0-D7 RAS: SDRAM D0-D7 CAS: SDRAM D0-D7 WE: SDRAM D0-D7 VDDSPD VREF VDD VSS SPD D0-D7 D0-D7 D0-D7/SPD Swissbit AG Industriestrasse 4 Ch-9552 Bronschhofen Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 www.swissbit.com eMail: [email protected] Page 5 of 14 5 Page Data Sheet Rev.1.2 09.11.2010 DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Continued) (0°C ≤ TCASE ≤ + 85°C ; VDDQ = +1.8V ± 0.1V, VDD = +1.8V ± 0.1V) AC CHARACTERISTICS PARAMETER ODT power-down exit latency ODT enable from MRS command Exit active power-down to READ command, MR [bit 12 = 0] Exit active power-down to READ command, MR [bit 12 = 1] Exit precharge power-down to any non-READ command CKE minimum high/low time SYMBOL tAXPD TMOD tXARD tXARDS tXP tCKE 5300-555 MIN MAX 8 12 2 7 – AL 2 3 6400-666 MIN MAX 8 12 2 8 – AL 2 3 Unit tCK ns tCK tCK tCK tCK Swissbit AG Industriestrasse 4 Ch-9552 Bronschhofen Fon: +41 (0) 71 913 03 03 Fax: +41 (0) 71 913 03 15 www.swissbit.com eMail: [email protected] Page 11 of 14 11 Page

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