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PDF HC125 Data sheet ( Hoja de datos )

Número de pieza HC125
Descripción Quad. Bus Buffer Gates (with 3-state outputs)
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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No Preview Available ! HC125 Hoja de datos, Descripción, Manual

HD74HC125/HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into
the high impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low
to put the output into high impedance.
Features
High Speed Operation: tpd = 8 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
C
HC125
HC126
A
HL
X
LH
L
LH
H
X : Irrelevent
Z : Off (high-impedance) state of a 3-state output.
Output Y
HC125
Z
L
H
HC126
Z
L
H

1 page




HC125 pdf
HD74HC125/HD74HC126
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Symbol
Propagation delay tPLH
time
t PHL
VCC (V)
2.0
4.5
6.0
Min Typ Max Min
— — 100 —
— 8 20 —
— — 17 —
Max Unit
125 ns
25
21
Output enable
time
t ZH
t ZL
2.0 — — 150 — 190 ns
4.5 — 9 30 — 38
6.0 — — 26 — 33
Output disable
time
t HZ
t LZ
2.0 — — 150 — 190 ns
4.5 — 14 30 — 38
6.0 — — 26 — 33
Output rise/fall
time
t TLH
t THL
2.0 — — 60 — 75 ns
4.5 — 4 12 — 15
6.0 — — 10 — 13
Input capacitance Cin — — 5 10 — 10 pF
Test Conditions
5

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