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PDF EN6360QA Data sheet ( Hoja de datos )
| Número de pieza | EN6360QA | |
| Descripción | 8A PowerSoC Highly Integrated Synchronous DC-DC Buck | |
| Fabricantes | Altera | |
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Enpirion® Power Datasheet
EN6360QA 8A PowerSoC
Highly Integrated Synchronous
DC-DC Buck with Integrated Inductor
Description
The EN6360QA is an 8A Power System on a Chip
(PowerSoC) DC to DC converter with an integrated
inductor, PWM controller, MOSFETs and
compensation to provide the smallest solution size in
an 8x11x3mm 68 pin QFN module. The EN6360QA is
AEC-Q100 qualified for automotive applications and
is specifically designed to meet the precise voltage
and fast transient requirements of high-performance,
low-power processor, DSP, FPGA, memory boards
and system level applications in distributed power
architecture. The EN6360QA features switching
frequency synchronization with an external clock or
other EN6360QAs for parallel operation. Other
features include precision enable threshold, pre-bias
monotonic start-up, and programmable soft-start. The
device’s advanced circuit techniques, ultra high
switching frequency, and proprietary integrated
inductor technology deliver high-quality, ultra
compact, non-isolated DC-DC conversion.
The Altera Enpirion integrated inductor solution
significantly helps to reduce noise. The complete
power converter solution enhances productivity by
offering greatly simplified board design, layout and
manufacturing requirements. All Altera Enpirion
products are RoHS compliant and lead-free
manufacturing environment compatible.
Features
• High Efficiency (Up to 96%)
• -40°C to +105°C Ambient Temperature Range
• AEC-Q100 Qualified for Automotive Applications
• CISPR 25 §6.6 / ISO11452-5 Compliant
• Excellent Ripple and EMI Performance
• Up to 8A Continuous Operating Current
• Input Voltage Range (2.5V to 6.6V)
• Frequency Synchronization (Clock or Primary)
• 2% VOUT Accuracy (Over Line/Load/Temperature)
• Optimized Total Solution Size (210mm2)
• Precision Enable Threshold for Sequencing
• Programmable Soft-Start
• Master/Slave Configuration for Parallel Operation
• Thermal Shutdown, Over-Current, Short Circuit,
and Under-Voltage Protection
• RoHS Compliant, MSL Level 3, 260°C Reflow
Applications
• Automotive Applications
• Point of Load Regulation for Low-Power, ASICs
Multi-Core and Communication Processors, DSPs,
FPGAs and Distributed Power Architectures
• High Efficiency 12V Intermediate Bus Architectures
• Beat Frequency/Noise Sensitive Applications
VIN
2x
22µF
1206
PVIN
VOUT
ENABLE
EN6360QA
AVIN
SS VFB
VOUT
2x
47µF
1210
RA CA
R1
15nF
PGND
PGND
AGND FQADJ
RFQADJ
RB
Figure 1. Simplified Applications Circuit
100
90
80
70
60
50
40
30
20
10
0
0
Efficiency vs. Output Current
CONDITIONS
VIN = 5.0V
VOUT = 3.3V
VOUT = 1.2V
Actual Solution Size
210mm2
123456
OUTPUT CURRENT (A)
7
8
Figure 2. Highest Efficiency in Smallest Solution Size
10396
October 7, 2014
www.altera.com/enpirion
Rev A
1 page  
EN6360QA
Electrical Characteristics
NOTE: VIN=6.6V, Minimum and Maximum values are over operating ambient temperature range unless otherwise noted.
Typical values are at TA = 25°C.
PARAMETER
Operating Input
Voltage
SYMBOL
VIN
TEST CONDITIONS
MIN TYP MAX UNITS
2.5 6.6 V
VFB Pin Voltage
VFB Pin Voltage
(Line, Load and
Temperature)
VVFB
VVFB
Internal Voltage Reference at:
VIN = 5V, ILOAD = 0, TA = 25°C
2.5V ≤ VIN ≤ 6.6V
0A ≤ ILOAD ≤ 8A
0.594 0.600 0.606
0.588 0.600 0.612
V
V
VFB Pin Input Leakage
Current
IVFB
VFB Pin Input Leakage Current
-0.2
0.2 µA
Shut-Down Supply
Current
IS
Power Supply Current with
ENABLE=0
1.5 mA
Under Voltage Lock-
out – VIN Rising
Under Voltage Lock-
out – VIN Falling
VUVLOR
VUVLOF
Voltage Above Which UVLO is Not
Asserted
Voltage Below Which UVLO is
Asserted
2.2
2.1
V
V
Drop Out Voltage
VDO
VINMIN – VOUT at Full Load
400 800
Drop Out Resistance
Continuous Output
Current
RDO
IOUT_SRC
Input to Output Resistance
(Subject to De-rating)
50 100
08
Over Current Trip
Level
IOCP
Sourcing Current
16
Switching Frequency
External SYNC Clock
Frequency Lock
Range
FSW
FPLL_LOCK
RFADJ = 4.42 kΩ, VIN = 5V
SYNC Clock Input Frequency
Range
0.9 1.2 1.5
0.9*Fsw Fsw 1.1*Fsw
S_IN Clock Amplitude
– Low
VS_IN_LO
SYNC Clock Logic Low
0
0.8
S_IN Clock Amplitude
– High
VS_IN_HI
SYNC Clock Logic High
1.8
2.5
S_IN Clock Duty Cycle
(PLL)
DCS_INPLL
M/S Pin Float or Low
20 80
S_IN Clock Duty Cycle
(PWM)
DCS_INPWM
M/S Pin High
10 90
Allowable Pre-bias as a Fraction of
Pre-Bias Level
VPB
Programmed Output Voltage for
Monotonic start up. Minimum Pre-
20
bias Voltage = 300mV.
75
Non-Monotonicity
VPB_NM
Allowable Non-monotonicity Under
Pre-bias Startup
100
VOUT Range for POK =
High
Range of Output Voltage as a
Fraction of Programmed Value
When POK is Asserted. (Note 3)
90
120
mV
mΩ
A
A
MHz
MHz
V
V
%
%
%
mV
%
10396
October 7, 2014
www.altera.com/enpirion, Page 5
Rev A
5 Page 
Typical Performance Characteristics
EN6360QA
Output Ripple at 20MHz Bandwidth
VOUT
(AC Coupled)
CONDITIONS
VIN = 5V
VOUT = 1V
IOUT = 8A
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
Output Ripple at 500MHz Bandwidth
VOUT
(AC Coupled)
CONDITIONS
VIN = 5V
VOUT = 1V
IOUT = 8A
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
Output Ripple at 20MHz Bandwidth
VOUT
(AC Coupled)
CONDITIONS
VIN = 5V
VOUT = 2.4V
IOUT = 8A
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
Output Ripple at 500MHz Bandwidth
VOUT
(AC Coupled)
CONDITIONS
VIN = 5V
VOUT = 2.4V
IOUT = 8A
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
Enable Power Up/Down
ENABLE
VOUT
CONDITIONS
VIN = 5V
VOUT = 1.0V
IOUT = 8A
Css = 15nF
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
Enable Power Up/Down
ENABLE
VOUT
CONDITIONS
VIN = 5V
VOUT = 2.4V
IOUT = 8A
Css = 15nF
CIN = 2 x 22µF (1206)
COUT = 2 x 47 µF (1210)
10396
October 7, 2014
www.altera.com/enpirion, Page 11
Rev A
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet EN6360QA.PDF ] | |
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