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PI74ALVCH16500 Datasheet Download - Pericom Semiconductor

Номер произв PI74ALVCH16500
Описание 18-Bit Universal Bus Transceiver
Производители Pericom Semiconductor
логотип Pericom Semiconductor логотип 

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PI74ALVCH16500 Даташит, Описание, Даташиты
PI74ALVCH165001122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233445566778899001122112233445566778899001122
18-Bit Universal Bus Transceiver
With 3-State Outputs
Product Features
PI74ALVCH16500 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-State
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
1
OEAB
55
CLKAB
2
LEAB
28
LEBA
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced using the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The 18-bit PI74ALVCH16500 univeral bus transceiver is designed
for 2.3V to 3.6V Vcc operation.
Data flow in each direction is controlled by Output Enable (OEAB
and OEBA), Latch- Enable (LEAB and LEBA), and clock (CLKAB
and CLKBA) inputs. For A- to-B data flow, the device operates in
the transparent mode when LEAB is high. When LEAB is low, the
A data is latched if CLKAB is held at a high or low logic level. If
LEAB is low, the A data is stored in the latch/flip-flop on the high-
to-low transition of CLKAB. Output-enable OEAB is active high.
When OEAB is high, the B-port outputs are active. When OEAB is
low, the B-port outputs are in the high-impedence state.
Data flow for B to A is similar to that of A to B but uses OEBA,
LEBA, and CLKBA. The Output Enables are complementary
(OEAB is active HIGH and OEBA is active LOW).
To ensure the high-impedance state during power up or power
down, OEBA should be tied to Vcc through a pull-up resistor and
OEAB should be tied to GND through a pulldown resistor; the
minimum value of the resistor is determined by the current-sinking/
current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
30
CLKBA
27
OEBA
3
A1
C1 1D
C1
1D
CLK
1D
C1
CLK
54
B1
TO 17 OTHER CHANNELS
1 PS8155A 11/06/00







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PI74ALVCH16500 Даташит, Описание, Даташиты
PI74ALVCH16500
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Product Pin Description
Pin Name
OE
LE
CLK
Ax
Bx
GND
VCC
Description
Output Enable Input (Active HIGH)
Latch Enable (Active HIGH)
Clock Input (Active LOW)
Data I/O
Data I/O
Ground
Power
Product Pin Configuration
OEAB
LEAB
A1
GND
A2
A3
VCC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
VCC
A16
A17
GND
A18
OEBA
LEBA
1 56
2 55
3 54
4 53
5 52
6 51
7 50
8 49
9 48
10 47
11 46
12 56-Pin 45
13 A, V 44
14 43
15 42
16 41
17 40
18 39
19 38
20 37
21 36
22 35
23 34
24 33
25 32
26 31
27 30
28 29
GND
CLKAB
B1
GND
B2
B3
VCC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
VCC
B16
B17
GND
B18
CLKBA
GND
Truth Table(1)†
Inputs
OEAB LEAB CLKAB
A
Output B
LXX X
Z
HH X
L
L
HH X H
H
HL ¯ L
L
HL ¯ H
H
H L L OR H X B0‡
Note:
1. H = High Signal Level
L = Low Signal Level
Z = High Impedance
= HIGH-to-LOW Transition
† A-to-B data flow is shown: B-to-A flow is similar but
uses OEBA, LEBA, CLKBA.
‡ Output level before the indicated steady-state input
conditions were established.
2 PS8155A 11/06/00







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PI74ALVCH16500 Даташит, Описание, Даташиты
PI74ALVCH16500
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ......................................................... –65°C to +150°C
Ambient Temperature with Power Applied ........................ –40°C to +85°C
Input Voltage Range, VIN .................................................. –0.5V to VCC +0.5V
Output Voltage Range, VOUT ........................................... –0.5V to VCC +0.5V
DC Input Voltage ................................................................. –0.5V to +5.0V
DC Output Current ........................................................................... 100 mA
Power Dissipation ................................................................................ 1.0W
Recommended Operating Conditions(1)
Note:
Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure
to absolute maximum rating conditions for ex-
tended periods may affect reliability.
Parameters
Description
Test Conditions
Min. Typ.
VCC Supply Voltage
2.3
VIH Input HIGH Voltage
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
1.7
2.0
VIL Input LOW Voltage
VCC = 2.3V to 2.7V
VCC = 2.7V to 3.6V
VIN Input Voltage
0
VOUT Output Voltage
0
VCC = 2.3V
IOH High-level Output Current
VCC = 2.7V
VCC = 3.0V
VCC = 2.3V
IOL Low-level Output Current
VCC = 2.7V
VCC = 3.0V
TA Operating Free-Air Temperature
-40
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
Max. Units
3.6
0.7 V
0.8
VCC
VCC
-12
-12
-24
mA
12
12
24
85 °C
3 PS8155A 11/06/00










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