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PDF M170ES04-V1 Data sheet ( Hoja de datos )
| Número de pieza | M170ES04-V1 | |
| Descripción | SXGA Color TFT-LCD Module | |
| Fabricantes | AUO | |
| Logotipo |  |
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Product Specifications
17.0” SXGA Color TFT-LCD Smart Integration Module
Model Name: M170ES04
V.1
( ) Preliminary Specifications
( ) Final Specifications
(C) Copyright AU Optronics Corporation
August, 2001 All Rights Reserved.
No Reproduction and Redistribution Allowed.
M170ES04 Ver 0.3
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2.2 Functional Block Dia gram
The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Smart Module:
X PCB
Hirose FH12-30S
Hirose FH12-50S
JST BHR-04VS-1
Mating Type SM04 (4.0) B-BHS -1-TB
2.3 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature):
Item
Viewing Angle
Contrast ratio
Response Time
Color / Chromaticity
Coordinates (CIE)
Unit
[degree]
[degree]
[degree]
[degree]
[degree]
[degree]
[degree]
[degree]
Conditions
Horizontal (Right)
CR = 10 (Left)
Vertical (Up)
CR = 10 (Down)
Horizontal (Right)
CR = 5 (Left)
Vertical (Up)
CR = 5 (Down)
[msec]
[msec]
[msec]
Normal Direction
Raising Time
Falling Time
Raising + Falling
Red x
Red y
Green x
Green y
Blue x
Min.
60/60
-
50
55
70
-
70
-
250
-
-
-
0.59
0.3
0.27
0.57
0.12
Typ.
70/70
60
65
80
80
400
25
15
40
0.62
0.33
0.30
0.60
0.15
Max.
-
-
-
-
-
-
-
-
-
35-
25-
-
0.65
0.36
0.33
0.63
0.18
(C) Copyright AU Optronics Corporation
August, 2001 All Rights Reserved.
M170ES04 Ver 0.3
5/24
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
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3 EDO/I
Horizontal Start Pulse (Even)
4 GND
Ground
5 XECLK Pixel Clock Input (Even)
6 GND
Ground
7 XEDINV Data Reverse
8 GND
Ground
Control Signal (Even)
9 XOOR7 Red Data bit 7 (Odd-Odd)
10 XOOR6 Red Data bit 6 (Odd-Odd)
11 XOOR5 Red Data bit 5 (Odd-Odd)
12 XOOR4 Red Data bit 4 (Odd-Odd)
13 XOOR3 Red Data bit 3 (Odd-Odd)
14 XOOR2 Red Data bit 2 (Odd-Odd)
15 XOOR1 Red Data bit 1 (Odd-Odd)
16 XOOR0 Red Data bit 0 (Odd-Odd)
17 XOOG7 Green Data bit 7 (Odd-Odd)
18 XOOG6 Green Data bit 6 (Odd-Odd)
19 XOOG5 Green Data bit 5 (Odd-Odd)
20 XOOG4 Green Data bit 4 (Odd-Odd)
21 XOOG3 Green Data bit 3 (Odd-Odd)
22 XOOG2 Green Data bit 2 (Odd-Odd)
23 XOOG1 Green Data bit 1 (Odd-Odd)
24 XOOG0 Green Data bit 0 (Odd-Odd)
25 GND
Ground
26 XOOB7 Blue Data bit 7 (Odd-Odd)
27 XOOB6 Blue Data bit 6 (Odd-Odd)
28 XOOB5 Blue Data bit 5 (Odd-Odd)
29 XOOB4 Blue Data bit 4 (Odd-Odd)
30 XOOB3 Blue Data bit 3 (Odd-Odd)
31 XOOB2 Blue Data bit 2 (Odd-Odd)
32 XOOB1 Blue Data bit 1 (Odd-Odd)
33 XOOB0 Blue Data bit 0 (Odd-Odd)
34 OPOL
Source driver output
polarity control (Odd)
35 OLOAD Source driver latch pulse 36 ODO/I
Horizontal Start Pulse (Odd)
(Odd)
37 GND
Ground
38 XOCLK Pixel Clock Input (Odd)
39 GND
Ground
40 XODINV Data Reverse
Control Signal (Odd)
41 GND
Ground
42 XOER7 Red Data bit 7 (Odd-Even)
43 XOER6 Red Data bit 6 (Odd-Even)
44 XOER5 Red Data bit 5 (Odd-Even)
45 XOER4 Red Data bit 4 (Odd-Even)
46 XOER3 Red Data bit 3 (Odd-Even)
47 XOER2 Red Data bit 2 (Odd-Even)
48 XOER1 Red Data bit 1 (Odd-Even)
49 XOER0 Red Data bit 0 (Odd-Even)
50 XOEG7 Green Data bit 7(Odd-Even)
J5 CONNECTOR
Pin Symbol
No.
1 XOEG6
3 XOEG4
5 XOEG2
7 XOEG0
9 XOEB7
11 XOEB5
13 XOEB3
15 XOEB1
17 V33
19 V33
21 AVDD
23 YV1
25 GND
27 YOE
Description
Pin Symbol
Description
No.
Green Data bit 6 (Odd-Even)
2 XOEG5 Green Data bit 5 (Odd-Even)
Green Data bit 4 (Odd-Even)
4 XOEG3 Green Data bit 3 (Odd-Even)
Green Data bit 2 (Odd-Even)
6 XOEG1 Green Data bit 1 (Odd-Even)
Green Data bit 0 (Odd-Even)
8 GND
Ground
Blue Data bit 7 (Odd-Even)
10 XOEB6 Blue Data bit 6 (Odd-Even)
Blue Data bit 5 (Odd-Even)
12 XOEB4 Blue Data bit 4 (Odd-Even)
Blue Data bit 3 (Odd-Even)
14 XOEB2 Blue Data bit 2 (Odd-Even)
Blue Data bit 1 (Odd-Even)
16 XOEB0 Blue Data bit 0 (Odd-Even)
Digital Power Input
18 V33
Digital Power Input
(DC +3.3V)
(DC +3.3V)
Digital Power Input
20 AVDD
Analog Power Input
(DC +3.3V)
(DC +12.5V)
Analog Power Input
22 AVDD
Analog Power Input
(DC +12.5V)
(DC +12.5V)
Gate Driver High Voltage 24 YVEE
Gate Driver Low Voltage Input
Input (DC +26.5V)
Ground
(DC -6V)
26 GATE-ON Gate Driver Output
Enable Signal
Gate Driver output
28 YCLK
Gate Driver Pixel Clock Input
(C) Copyright AU Optronics Corporation
August, 2001 All Rights Reserved.
M170ES04 Ver 0.3
11/24
No Reproduction and Redistribution Allowed.
One step solution for LCD / PDP / OLED panel application: Datasheet, inventory and accessory! www.panelook.com
11 Page | ||
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| PDF Descargar | [ Datasheet M170ES04-V1.PDF ] | |
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