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PDF SCH5127 Data sheet ( Hoja de datos )

Número de pieza SCH5127
Descripción Super I/O
Fabricantes Microchip 
Logotipo Microchip Logotipo



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No Preview Available ! SCH5127 Hoja de datos, Descripción, Manual

SCH5127
Super I/O with Temperature Sensing, Auto Fan Control and
Glue Logic
Product Features
• General Features
- 3.3 Volt Operation (Most I/O Pins are 5 Volt
Tolerant)
- LPC Interface
- PC99, PC2001 Compliant
- ACPI 2.0 Compliant
- Multiplexed Command, Address and Data
Bus
- Serial IRQ Interface Compatible with Serial-
ized IRQ Support for PCI Systems
- PME Interface
- ISA Plug-and-Play Compatible Register Set
- Programmable Wake-up Event (PME) Inter-
face
- System Management Interrupt (SMI)
- 30 General Purpose Input/Output Pins
• AC Power Failure Recovery
• Watchdog Timer Capable to Pulse PWRGD Low
and Change GPO Polarity
• 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk Controller
- Software and Register Compatible with
Microchip's Proprietary 82077AA Compatible
Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-Pull
Output Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to Eight IRQ and Four DMA
Options
- Support 3 Mode FDD
• Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250
Kbps Data Rates
- Programmable Precompensation Modes
• Serial Port
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible UARTs
with Send/Receive 16-Byte FIFOs
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
• Multi-Mode™ Parallel Port with ChiProtect™
- Standard Mode IBM PC/XT®, PC/AT®, and
PS/2™ Compatible Bi-directional Parallel
Port
- Enhanced Parallel Port (EPP) Compatible -
EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant)
- IEEE 1284 Compliant Enhanced Capabilities
Port (ECP)
- ChiProtect Circuitry for Protection
- 960 Address, Up to 15 IRQ and Four DMA
Options
• Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for Key-
board/Mouse Interface
- Asynchronous Access to Two Data Registers
and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
- Phoenix Keyboard BIOS ROM
• Motherboard GLUE Logic
- Resume Reset Signal Generation
- IDE Reset Output
- (4) Buffered PCI Reset Outputs with software
controlled reset capability
- Two 3VSB Gate signal generation for Sus-
pend to RAM or S3/S5 Wake up dual power
plane control
- Front Panel Reset Debouncing and Main
3.3V Power Good Signal Generation
- Power Supply Turn On Circuitry with Support
for power button on PS/2 Keyboard
- Switches for SMBus Isolation or Voltage
Translation for DDC to VGA Monitor Circuitry
- LED Control (2)
- Speaker Input & Output Control
2014 Microchip Technology Inc.
DS00001786A-page 1

1 page




SCH5127 pdf
PACKAGE OUTLINE
128 Pin QFP Package Outline, 14x20x2.7 Body, 3.2 mm Footprint
SCH5127
Min
Nominal
Max
A~
~ 3.4
A1 0.05 ~ 0.5
A2 2.55 ~ 3.05
D 23.00
23.20
23.40
D1 19.90
20.00
20.10
E 17.00
17.20
17.40
E1 13.90
14.00
14.10
H 0.09 ~ 0.20
L 0.73 0.88 1.03
L1 ~ 1.60 ~
e 0.50 Basic
q 0o ~ 7o
W 0.10 ~ 0.30
R1 0.08
~
~
R2 0.08 ~ 0.30
ccc ~
~ 0.08
Remarks
Overall Package Height
Standoff
Body Thickness
X Span
X body Size
Y Span
Y body Size
Lead Frame Thickness
Lead Foot Length
Lead Length
Lead Pitch
Lead Foot Angle
Lead Width
Lead Shoulder Radius
Lead Foot Radius
Coplanarity
Note 1: Controlling Unit: millimeter.
2: Tolerance on the position of the leads is ± 0.04 mm maximum.
3: Package body dimensions D1 and E1 do not include the mold protrusion.
Maximum mold protrusion is 0.25 mm.
4: Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane.
5: Details of pin 1 identifier are optional but must be located within the zone indicated.
2014 Microchip Technology Inc.
DS00001786A-page 5

5 Page










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