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82574 PDF даташит

Спецификация 82574 изготовлена ​​​​«Intel Corporation» и имеет функцию, называемую «Gigabit Ethernet Controller».

Детали детали

Номер произв 82574
Описание Gigabit Ethernet Controller
Производители Intel Corporation
логотип Intel Corporation логотип 

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82574 Даташит, Описание, Даташиты
Intel® 82574 Family Gigabit Ethernet
Controller Specification Update
July 2015
Revision 4.0









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82574 Даташит, Описание, Даташиты
82574 Specification Update
No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.
Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose,
and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.
This document contains information on products, services and/or processes in development. All information provided here is subject to change without
notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps.
The products and services described may contain defects or errors which may cause deviations from published specifications.
Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725 or by visiting
www.intel.com/design/literature.htm.
Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries.
*Other names and brands may be claimed as the property of others.
© 2015 Intel Corporation.
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82574 Даташит, Описание, Даташиты
82574 Specification Update
Revision History
Date
May 2006
May 2006
November 2006
May 2007
June 2007
August 2007
March 2008
June 2008
August 2008
Sept 2008
Oct 2008
Feb 2009
April 2009
June 2009
August 2009
October 2009
November 2009
March 2010
March 2010
January 2011
February 2011
July 2011
January 2012
June 2012
June 2012
October 2013
June 2014
July 2015
Revision Description
0.10
0.25
0.50
0.75
0.76
0.89
0.5
1.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
Initial version.
Updated Feature List, Visual Pin Assignment Diagram, and Pin List. Schematics and Checklists updated (in separate
documents).
Minor updates to table notes; corrected Ta value in Tables 34 & 35;
Major revamping of structure and content--now includes specifications, design guidance, and register listings. Updated
power estimates with measured values.
Corrected RSVDC_2 signal name to JRST_N. Added information about JRST_N.
Review Draft.
Initial release.
Added Errata #1 through #9.
• New document format and organization, added device IDs to section 1.2 “Product Code and Device Identification”.
• Updated section 1.3 “Marking Diagram”, updated Errata #2 title to “100BASE-TX Marginal Rise/Fall Time
Performance”.
• Changed PCIe reference from “PCIe v2.0 (2.5GT/s)” to “PCIe v1.1 (2.5GT/s)”.
• Added document ordering number on front page.
• Added assembly date code numbers for A0 and A1 devices to section 1.3.
• Added Errata #10, #11, and #12.
• Updated section 1.3.
• Added Specification Clarification #1.
• Updated Sections 1.3 and 1.4, updated Figures 1 and 2, added Errata #13 and #14.
• Added Specification Clarification #2.
• Removed Erratum #10.
• Updated title of Specification Clarification #1.
• Added Erratum #15.
• Added Erratum #16.
• Updated Erratum #15. Added Erratum #17, #18, 19, and #20.
• Added Specification Clarification #3, #4, and #5.
• Added Software Clarification #1.
• Added Specification Change #1 and #2.
• Added Erratum #21.
• Added Specification Change #3.
• Added Erratum #22.
• Revised Erratum #18.
• Added Software Clarification #2.
• Added Specification Change #4.
• Added Erratum #23.
• Revised Erratum #23.
• Added Errata #24 and #25.
• Added Erratum #26.
• Updated Erratum #25.
• Added Erratum #27.
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