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GM71C17400C PDF даташит

Спецификация GM71C17400C изготовлена ​​​​«Hynix Semiconductor» и имеет функцию, называемую «CMOS DYNAMIC RAM».

Детали детали

Номер произв GM71C17400C
Описание CMOS DYNAMIC RAM
Производители Hynix Semiconductor
логотип Hynix Semiconductor логотип 

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GM71C17400C Даташит, Описание, Даташиты
GM71C(S)17400C/CL
4,194,304 WORDS x 4 BIT
CMOS DYNAMIC RAM
Description
The GM71C(S)17400C/CL is the new
generation dynamic RAM organized 4,194,304
words x 4 bit. GM71C(S)17400C/CL has
realized higher density, higher performance and
various functions by utilizing advanced CMOS
process technology. The GM71C(S)17400C/CL
offers Fast Page Mode as a high speed access
mode. Multiplexed address inputs permit the
GM71C(S)17400C/CL to be packaged in a
standard 300 mil 24(26) pin SOJ, and a standard
300 mil 24(26) pin plastic TSOP II. The
package size provides high system bit densities
and is compatible with widely available
automated testing and insertion equipment.
System oriented features include single power
supply 5.0V+/-10% tolerance, direct interfacing
capability with high performance logic families
such as Schottky TTL.
Pin Configuration
24(26) SOJ
Features
* 4,194,304 Words x 4 Bit Organization
* Fast Page Mode Capability
* Single Power Supply (5.0V+/-10%)
* Fast Access Time & Cycle Time
(Unit: ns)
GM71C(S)17400C/CL-5
GM71C(S)17400C/CL-6
GM71C(S)17400C/CL-7
tRAC tCAC tRC
50 13 90
60 15 110
70 18 130
tPC
35
40
45
* Low Power
Active : 660/605/550mW (MAX)
Standby : 11mW (CMOS level : MAX)
: 0.83mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
* All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Battery backup operation (L-version)
* Test function : 16bit parallel test mode
24(26) TSOP II
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
NC 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
VCC 1
I/O1 2
I/O2 3
WE 4
RAS 5
A11 6
A10 8
A0 9
A1 10
A2 11
A3 12
VCC 13
26 VSS
25 I/O4
24 I/O3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
(Top View)
Rev 0.1 / Apr’01









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GM71C17400C Даташит, Описание, Даташиты
GM71C(S)17400C/CL
Pin Description
Pin
A0-A10
A0-A10
I/O1-I/O4
RAS
CAS
Function
Address Inputs
Refresh Address Inputs
Data Input/Data Output
Row Address Strobe
Column Address Strobe
Pin
WE
OE
VCC
VSS
NC
Ordering Information
Type No.
GM71C(S)17400CJ/CLJ-5
GM71C(S)17400CJ/CLJ-6
GM71C(S)17400CJ/CLJ-7
GM71C(S)17400CT/CLT-5
GM71C(S)17400CT/CLT-6
GM71C(S)17400CT/CLT-7
Access Time
50ns
60ns
70ns
50ns
60ns
70ns
Function
Read/Write Enable
Output Enable
Power (5.0V)
Ground
No Connection
Package
300 Mil
24(26) Pin
Plastic SOJ
300 Mil
24(26) Pin
Plastic TSOP II
Absolute Maximum Ratings*
Symbol
Parameter
Rating
TA Ambient Temperature under Bias
0 ~ 70
TSTG
Storage Temperature (Plastic)
-55 ~ 125
VIN/VOUT
VCC
Voltage on any Pin Relative to VSS
Voltage on VCC Relative to VSS
-1.0 ~ 7.0
-1.0 ~ 7.0
IOUT Short Circuit Output Current
50
PD Power Dissipation
1.0
*Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability.
Unit
C
C
V
V
mA
W
Recommended DC Operating Conditions (TA = 0 ~ 70C)
Symbol
VCC
VIH
VIL
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Min Typ
4.5 5.0
2.4 -
-1.0 -
Note: All voltage referred to Vss.
Max
5.5
6.0
0.8
Unit
V
V
V
Rev 0.1 / Apr’01









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GM71C17400C Даташит, Описание, Даташиты
GM71C(S)17400C/CL
DC Electrical Characteristics (VCC = 5.0V+/-10%, Vss = 0V, TA = 0 ~ 70C)
Symbol
VOH
VOL
ICC1
Parameter
Output Level
Output "H" Level Voltage (IOUT = -5mA)
Output Level
Output "L" Level Voltage (IOUT = 4.2mA)
Operating Current
Average Power Supply Operating Current
(RAS, CAS Cycling : tRC = tRC min)
ICC2 Standby Current (TTL)
Power Supply Standby Current
(RAS, CAS = VIH, DOUT = High-Z)
ICC3 RAS Only Refresh Current
Average Power Supply Current
RAS Only Refresh Mode
(tRC = tRC min)
ICC4 Fast Page Mode Current
Average Power Supply Current
Fast Page Mode
(tPC = tPC min)
ICC5 Standby Current (CMOS)
Power Supply Standby Current
(RAS, CAS >= VCC - 0.2V, DOUT = High-Z)
ICC6 CAS-before-RAS Refresh Current
(tRC = tRC min)
Min Max Unit Note
2.4 VCC
V
50ns
60ns
70ns
0
-
-
-
0.4 V
100
90 mA 1, 2
80
- 2 mA
50ns
60ns
70ns
50ns
60ns
70ns
50ns
60ns
70ns
-
-
-
-
-
-
-
-
-
-
-
100
90 mA
80
2
90
80 mA 1, 3
70
1 mA
150 uA
100
90 mA
80
4
Battery Backup Operating Current(Standby with CBR Refresh)
ICC7 (CBR refresh, tRC=62.5us, tRAS<=0.3us,
DOUT=High-Z, CMOS interface)
- 350 uA 4
Standby Current RAS = VIH
ICC8 CAS = VIL
DOUT = Enable
IL(I) Input Leakage Current
Any Input (0V<=VIN<= 6V)
IL(O) Output Leakage Current
(DOUT is Disabled, 0V<=VOUT<= 6V)
Note: 1. ICC depends on output load condition when the device is selected.
ICC(max) is specified at the output open condition.
2. Address can be changed once or less while RAS = VIL.
3. Address can be changed once or less while CAS = VIH.
4. L-version.
- 5 mA 1
-10 10 uA
-10 10 uA
Rev 0.1 / Apr’01










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