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PDF NCP5080 Data sheet ( Hoja de datos )
| Número de pieza | NCP5080 | |
| Descripción | Xenon Photoflash Capacitor Charge | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NCP5080
Xenon Photoflash Capacitor
Charge with Photo Sense
Interface
The NCP5080 product is a high voltage boost driver dedicated to the
Xenon power flashes.
The built-in DC/DC converter is based on a flyback structure with
an external transformer to adapt any range of high voltage demand.
The external feedback network makes it possible to dynamically
adjust of the output voltage.
Features
•ă2.7 V to 5.5 V Input Voltage Range
•ăXenon Function Fully Supported
•ăBuilt-in Short Circuit Protection
•ăDedicated Photo Flash Trigger Pin
•ăProvides IGBT drive
•ăEmbedded Photodiode Sense
•ăAdjustable Primary Ipeak Current
•ăThis is a Pb-Free Device
Typical Applications
•ăDigital Camera Photo Flash
•ăDigital Cellular Phone Camera Photo Flash
•ăLow Power Beacon
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MARKING DIAGRAM
1
LLGA12
CASE 513AD
XXXXX
XXXXX
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
(Note: Microdot may be in either location)
PHREF 1
TRGFL 2
IGBT 3
VBAT 4
PGND 5
VSW 6
12 PHSEN
11 VHB
10 IPKRF
9 AGND
8 READY
7 EN
ORDERING INFORMATION
Device
Package
Shipping†
+VBAT
GND
+VBAT
R6 D6
1k READY
S2
EN
ENABLE
S1
TRGFL
TRIGGER
NCP5080MUTXG LLGA12 3000 / Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
GND
+VBAT
C2
10mF/6.3V
GND
U1
READY8 READY
VBAT 4 2 T1
4
C3
22mF/315V
D1
14
BAS21-B
GND
7 EN
2 TRGFL
1 PHREF
12 PHSEN
10 IPK-REF
13
GND
Vsw 6
COILCRAFT-CJ5143-AL
GND
PGND 5
R12
IGBT 3
R7 10k
VHT
R3
X1
3
220k
T2
FLTRG-TB-KR8
13
C4
Ns Np 47nF/400V
2
9 AGNG
NCP5080
VFB 11
R1
33R
R2
8G
VHT
GND
1 34
Collector Q1
Emitter IGBT-CY25BAH-8F
GND
GND
12k
C1
10nF
3.0M
Figure 1. Typical NCP5080 Photo Flash Application
76 5
GND
©Ă Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 1
1
Publication Order Number:
NCP5080/D
1 page  
NCP5080
ANALOG SECTION (Typical values are referenced to TA = +25°C, minimum and maximum values are referenced -40°C to +85°C
ambient temperature, unless otherwise noted, operating conditions 2.85 V < VBAT < 5.5 V, unless otherwise noted)
Pin Symbol
Rating
Min Typ Max Unit
10 IREF Reference current @ VREF = 1.14 V (Notes 9
and 10)
10
100 mA
10 VREF Reference Voltage (Note 10)
10 IPKR Reference Current (IREF) Current Ratio
6 FPWM Internal DC/DC Flyback Frequency
@ VBAT = 4.2 V, Ip = 1 A, Lp = 6 mH, Lf = 200 nH,
Transformer = TDK (Note 11)
-3%
12000
15
1.14
13700
+3%
15400
600
V
kHz
11 VFB Output Voltage Feed Back reference
1 VPH Photo Sense Voltage Reference
1 VPHR Photo Reference Internal Resistance (Pin 1 to
GND)
1.10 1.15 1.20
V
0.5 1.5 V
625 kW
PFB Photo Feedback Tolerance
$3 %
9. IREF current specifies the reference current range one can absorb from the IREF pin
10. The external circuit must not force the IREF pin voltage either higher or lower than the 1.14 V specified.
11. This parameter depends solely upon the output transformer and load characteristic and cannot be tested.
12. The overall photo sense tolerance depends upon the accuracy of the external resistor. Using 1% or better resistor is recommended.
DIGITAL PARAMETERS SECTION (Typical values are referenced to TA = +25°C, minimum and maximum values are referenced
-40 °C to +85°C ambient temperature, unless otherwise noted, operating conditions 2.85 V < VBAT < 5.5 V, unless otherwise noted)
Pin Symbol
Rating
Min Typ Max Unit
2, 7 VIH EN, TRGFL Input Digital Signal
2, 7 VIL EN, TRGFL Input Digital Signal
8 VOL Ready Output Digital @ Irdy = 1 mA
2
Tpwfl
TRGFL Input Flash Signal Pulse Width
2, 7 Rp EN, TRGFL Input Pulldown Resistor
1.2
0
10
50
VBAT
0.4
V
V
0.3 V
ms
100 200 kW
NOTE: Digital inputs undershoot v 0.30 V to ground, Digital inputs overshoot < 0.30 V to VBAT.
DC/DC Startup
Start Next Cycle
EN
DC/DC
Operation
Vout Reference
Vout
READY
TRGFL
Vout = Programmed Value
Send Flash Command
Figure 3. Basic Operation Timings
DC/DC Operation
The converter is based on a flyback topology, associated
to an external transformer dedicated to the high voltage
application. The Primary/Secondary turns ratio is defined to
limit the peak voltage, at the NCP5080 pin VSW level, to the
operating voltage sustained by the internal NMOS device.
With a 1:10 ratio, the peak voltage is limited to 30 V to
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5
5 Page 
NCP5080
Figure 8. Output Capacitor Recharge Cycle
Figure 9. Xenon Tube Discharge Current
Figure 10. Recycling VOUT Slope and Battery
Input Current with Ipeak = 1.5 A
Figure 11. Recycling VOUT Slope and Battery
Input Current with Ipeak = 750 mA
TRGFL: Trigger Flash pulse
PHREF: photo sense reference voltage ( provided by the external circuit)
PHSEN: photo sense input voltage ( provided by the photo transistor sensor )
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NCP5080.PDF ] | |
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