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PDF NL8060BC31-50F Data sheet ( Hoja de datos )

Número de pieza NL8060BC31-50F
Descripción TFT COLOR LCD MODULE
Fabricantes NEC 
Logotipo NEC Logotipo



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TFT COLOR LCD MODULE
NL8060BC31-50F
31cm (12.1 Type)
SVGA
PRELIMINARY DATA SHEET
DOD-PP-0991 (1st edition)
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0991 (1st edition)
Published date: April 2010 CP(N)
1 ¤ NEC LCD Technologies, Ltd.
2010 All rights reserved.
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NL8060BC31-50F pdf
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NL8060BC31-50F
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
246.0 (H) u 184.5 (V) mm
31cm (12.1 inches)
a-Si TFT active matrix
262,144 colors
800 (H) u 600 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.1025 (H) u 0.3075 (V) mm
0.3075 (H) u 0.3075 (V) mm
260.5 (W) u 203.0 (H) u 8.7 (D) mm (typ.)
490 g (typ.)
800:1 (typ.)
At the contrast ratio t 10:1
x Horizontal: Right side 80q (typ.), Left side 80q (typ.)
x Vertical: Up side 80q (typ.), Down side 80q (typ.)
At DPS= Low or Open: Normal scan
x Viewing direction without image reversal: Up side (12 o'clock)
x Viewing direction with contrast peak: Down side (6 o'clock)
x Viewing angle with optimum grayscale (J2.2): Normal axis
(perpendicular)
Clear
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton + Toff (10% mo 90%)
TBD ms (typ.)
At IL= 50 mA/One circuit
800 cd/m2 (typ.)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE),
Horizontal synchronous signal (Hsync),
Vertical synchronous signal (Vsync)
LCD panel signal processing board: 3.3V or 5.0V
LED backlight type:
Backlight
Replaceable part
x Lamp holder set: Type No. TBD
Recommended LED driver board (Option)
x LED driver board :Type No. TBD
Power consumption
At IL= 50 mA/One circuit, Checkered flag pattern
TBD W (typ.)
PRELIMINARY DATA SHEET DOD-PP-0991 (1st edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
3.0V or 4.75V
0V
ON
10Ps d Tr < 50ms
Display signals,
Function signal
Note2
0V
0ms < t < 35ms
VALID period
NL8060BC31-50F
OFF ON
Toff • 50ms
0ms < t < 35ms
Note1: If there is a voltage variation (voltage drop) at the rising edge of VCC below 3.0V in "VCC =
3.3V" or 4.75V in "VCC = 5.0V", there is a possibility that a product does not work due to a
protection circuit.
Note2: Display signals (CLK, Hsync, Vsync, DE, DATA (R0 to R5, G0 to G5, B0 to B5)) and
function signal (DPS) must be set to Low or High-impedance, except the VALID period (See
above sequence diagram), in order to avoid the circuitry damage.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If a customer stops the
display and function signals, VCC also must be shut down.
4.4.2 LED Driver board (Option)
Display signals
Function signal
Note1
Note2
VALID period
LED backlight: ON
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
PRELIMINARY DATA SHEET DOD-PP-0991 (1st edition)
11
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