H5TQ5163MFR-16C Datasheet PDF - Hynix Semiconductor
| Part Number | H5TQ5163MFR-16C | |
| Description | 512Mb DDR3 SDRAM | |
| Manufacturers | Hynix Semiconductor | |
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H5TQ(S)5163MFR
512Mb DDR3 SDRAM
H5TQ(S)5163MFR
** Since DDR3 Specification has not been defined completely yet
in JEDEC, this document may contain items under discussion.
** Contents may be changed at any time without any notice.
Rev. 1.0 / Oct 2008
This document is a general product description and is subject to change without notice. Hynix semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
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H5TQ(S)5163MFR
DESCRIPTION
The H5TQ(S)5163MFR is a 1,073,741,824-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for
the main memory applications which requires large memory density and high bandwidth. Hynix 512Mb DDR3 SDRAMs
offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control
inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs
are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
1.1 Device Features and Ordering Information
. FEATURES
• VDD/VDDQ=1.5V +/- 0.075V
VDD/VDDQ=1.8V +/- 0.09V
• Fully differential clock inputs (CK, /CK) operation
• Differential Data Strobe (DQS, /DQS)
• On chip DLL align DQ, DQS and /DQS transition with CK
transition
• DM masks write data-in at the both rising and falling
edges of the data strobe
• All addresses and control inputs except data,
data strobes and data masks latched on the
rising edges of the clock
• Programmable CAS latency 5, 6, 7, 8, 9, 10, and (11)
supported
• Programmable additive latency 0, CL-1, and CL-2
supported
• Programmable CAS Write latency (CWL) = 5, 6, 7, 8
• Programmable burst length 4/8 with both nibble
sequential and interleave mode
• BL switch on the fly
• 8banks
• 8K refresh cycles /64ms
• JEDEC standard 96ball FBGA
• Driver strength selected by EMRS
• Dynamic On Die Termination supported
• Asynchronous RESET pin supported
• ZQ calibration supported
• Write Levelization supported
• Auto Self Refresh supported
• On Die Thermal Sensor supported ( JEDEC optional )
• 8 bit pre-fetch
. ORDERING INFORMATION
Part No.
H5TS5163MFR-NOC
H5TS5163MFR-11C
H5TS5163MFR-12C
H5TS5163MFR-14C
H5TQ5163MFR-12C
H5TQ5163MFR-14C
H5TQ5163MFR-16C
H5TQ5163MFR-20C
Power Supply
VDD/VDDQ
=1.8V
VDD/VDDQ
=1.5V
Clock
Frequency
1GHz
900MHz
800MHz
700MHz
800MHz
700MHz
600MHz
500MHz
Max Data Rate
2Gbps/pin
1.8Gbps/pin
1.6Gbps/pin
1.4Gbps/pin
1.6Gbps/pin
1.4Gbps/pin
1.2Gbps/pin
1.0Gbps/pin
Interface
SSTL-18
SSTL-15
Package
96Ball
FBGA
Note) Hynix supports Halogen free parts for each speed grade with same specification, except Halogen free materials.
We’ll add “R” character after “F” for Halogen free product.
For example, the part number of 500MHz Halogen free product is H5TQ5163MFR-20C.
Rev. 1.0 / Oct 2008
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for H5TQ5163MFR-16C electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ H5TQ5163MFR-16C.PDF Datasheet ] | |
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