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W83195CG-413 Datasheet Download - Winbond

Номер произв W83195CG-413
Описание Clock Generator
Производители Winbond
логотип Winbond логотип 

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W83195CG-413 Даташит, Описание, Даташиты
Winbond Clock Generator
W83195WG-413
W83195CG-413
For ATI P4 Chipset
Date: Feb/27/2006 Revision: 0.6







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W83195CG-413 Даташит, Описание, Даташиты
W83195WG-413/W83195CG-413
STEPLESS FOR ATI P4 CLOCK GENERATOR
W83195WG-413/W83195CG-413 Data Sheet Revision History
Pages
Dates
Version
1 n.a. 01/20/2006
0.5
Web
Version
n.a.
Main Contents
All of the versions before 0.50 are for internal
use.
2 8,13 02/27/2006
0.6
n.a. Modify default register value in blue text.
3
4
5
6
7
8
9
10
Please note that all data and specifications are subject to change without notice. All
the trademarks of products and companies mentioned in this data sheet belong to
their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or
systems where malfunction of these products can reasonably be expected to result
in personal injury. Winbond customers using or selling these products for use in such
applications do so at their own risk and agree to fully indemnify Winbond for any
damages resulting from such improper use or sales.
Publication Release Date: Feb 2006
- I - Revision 0.6







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W83195CG-413 Даташит, Описание, Даташиты
W83195WG-413/W83195CG-413
STEPLESS FOR ATI P4 CLOCK GENERATOR
TABLE OF CONTENT
1. GENERAL DESCRIPTION ......................................................................................................... 1
2. PRODUCT FEATURES .............................................................................................................. 1
3. PIN CONFIGURATION ............................................................................................................... 2
4. BLOCK DIAGRAM ...................................................................................................................... 2
5. PIN DESCRIPTION..................................................................................................................... 3
6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE ................................................ 5
7. I2C CONTROL AND STATUS REGISTERS ............................................................................... 6
7.1 Register 0: ( Default : 00h ) ......................................................................................................6
7.2 Register 1: ( Default : XXh) ......................................................................................................6
7.3 Register 2: ( Default : 03h ) ......................................................................................................7
7.4 Register 3: ( Default : 03h ) ......................................................................................................7
7.5 Register 4: ( Default : FEh) ......................................................................................................8
7.6 Register 5: ( Default : 02h ) ......................................................................................................9
7.7 Register 6: ( Default : FFh )......................................................................................................9
7.8 Register 7: Winbond Chip ID – Project Code Register ( Default : 06h )...............................10
7.9 Register 8: ( Default :D0h )..................................................................................................10
7.10 Register 9: ( Default : 7Ah )....................................................................................................11
7.11 Register 10: Reserved ( Default : 3Bh ).................................................................................11
7.12 Register 11: ( Default : 0Eh )..................................................................................................11
7.13 Register 12: ( Default : XXh ) .................................................................................................12
7.14 Register 13: ( Default : 3Fh )..................................................................................................12
7.15 Register 14: ( Default : D0h ) .................................................................................................13
7.16 Register 15: ( Default : 5Ch ) .................................................................................................13
7.17 Register 16: ( Default : 24h ) ..................................................................................................14
7.18 Register 17: Reserved ( Default : 0Fh ).................................................................................14
7.19 Register 18: Reserved ( Default : 7Ah ).................................................................................14
7.20 Register 19: ( Default : 04h ) ..................................................................................................14
7.21 Register 20: ( Default : 88h ) ..................................................................................................15
7.22 Register 21: ( Default : ECh ).................................................................................................15
Table3: SRC & ATIG Frequency Selection Table..............................................................................16
8. ACCESS INTERFACE .............................................................................................................. 17
8.1 Block Write protocol ...............................................................................................................17
8.2 Block Read protocol ...............................................................................................................17
8.3 Byte Write protocol .................................................................................................................17
8.4 Byte Read protocol.................................................................................................................17
9. SPECIFICATIONS .................................................................................................................... 18
Publication Release Date: Feb 2006
- II - Revision 0.6










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