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PDF NCP1608BDR2G Data sheet ( Hoja de datos )
| Número de pieza | NCP1608BDR2G | |
| Descripción | Critical Conduction Mode PFC Controller Utilizing a Transconductance Error Amplifier | |
| Fabricantes | ON Semiconductor | |
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NCP1608
Critical Conduction Mode
PFC Controller Utilizing a
Transconductance Error
Amplifier
The NCP1608 is an active power factor correction (PFC)
controller specifically designed for use as a pre−converter in ac−dc
adapters, electronic ballasts, and other medium power off−line
converters (typically up to 350 W). It uses critical conduction mode
(CrM) to ensure near unity power factor across a wide range of input
voltages and output power. The NCP1608 minimizes the number of
external components by integrating safety features, making it an
excellent choice for designing robust PFC stages. It is available in
a SOIC−8 package.
General Features
• Near Unity Power Factor
• No Input Voltage Sensing Requirement
• Latching PWM for Cycle−by−Cycle On Time Control (Voltage
Mode)
• Wide Control Range for High Power Application (>150 W) Noise
Immunity
• Transconductance Error Amplifier
• High Precision Voltage Reference (±1.6% Over the Temperature
Range)
• Very Low Startup Current Consumption (≤ 35 mA)
• Low Typical Operating Current Consumption (2.1 mA)
• Source 500 mA/Sink 800 mA Totem Pole Gate Driver
• Undervoltage Lockout with Hysteresis
• Pin−to−Pin Compatible with Industry Standards
• This is a Pb−Free and Halide−Free Device
Safety Features
• Overvoltage Protection
• Undervoltage Protection
• Open/Floating Feedback Loop Protection
• Overcurrent Protection
• Accurate and Programmable On Time Limitation
Typical Applications
• Solid State Lighting
• Electronic Light Ballast
• AC Adapters, TVs, Monitors
• All Off−Line Appliances Requiring Power Factor Correction
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAM
8
1608B
ALYW
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTION
FB
Control
Ct
CS
(Top View)
VCC
DRV
GND
ZCD
ORDERING INFORMATION
Device
Package
Shipping†
NCP1608BDR2G SOIC−8 2500 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 5
1
Publication Order Number:
NCP1608/D
1 page  
NCP1608
Table 3. ELECTRICAL CHARACTERISTICS (Continued)
VFB = 2.4 V, VControl = 4 V, Ct = 1 nF, VCS = 0 V, VZCD = 0 V, CDRV = 1 nF, VCC = 12 V, unless otherwise specified
(For typical values, TJ = 25°C. For min/max values, TJ = −55°C to 125°C (Note 6), VCC = 12 V, unless otherwise specified)
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
ERROR AMPLIFIER
Minimum Control Voltage to Generate
Drive Pulses
Control Voltage Range
RAMP CONTROL
VControl = Decreasing until
VDRV is low, VCt = 0 V
TJ = −40°C to +125°C
TJ = −55°C to +125°C (Note 6)
VEAH – Ct(offset)
Ct(offset)
VEA(DIFF)
0.37
0.37
4.5
0.65
0.65
4.9
0.88
1.1
5.3
V
V
Ct Peak Voltage
On Time Capacitor Charge Current
VControl = open
VControl = open
VCt = 0 V to VCt(MAX)
VCt(MAX)
Icharge
4.775
235
4.93
275
5.025
297
V
mA
Ct Capacitor Discharge Duration
PWM Propagation Delay
CURRENT SENSE
VControl = open
VCt = VCt(MAX) −100 mV to 500 mV
dV/dt = 30 V/ms
VCt = VControl − Ct(offset)
to VDRV = 10%
tCt(discharge)
tPWM
−
−
50 150 ns
130 220 ns
Current Sense Voltage Threshold
Leading Edge Blanking Duration
Overcurrent Detection Propagation De-
lay
Current Sense Bias Current
ZERO CURRENT DETECTION
VCS = 2 V, VDRV = 90% to 10%
dV/dt = 10 V/ms
VCS = VILIM to VDRV = 10%
VCS = 2 V
VILIM
tLEB
tCS
ICS
0.45 0.5
100 190
40 100
−1 −
0.55
350
170
1
V
ns
ns
mA
ZCD Arming Threshold
ZCD Triggering Threshold
ZCD Hysteresis
ZCD Bias Current
Positive Clamp Voltage
Negative Clamp Voltage
ZCD Propagation Delay
Minimum ZCD Pulse Width
Maximum Off Time in Absence of ZCD
Transition
VZCD = Increasing
VZCD = Decreasing
VZCD = 5 V
IZCD = 3 mA
TJ = −40°C to +125°C
TJ = −55°C to +125°C (Note 6)
IZCD = −2 mA
TJ = −40°C to +125°C
TJ = −55°C to +125°C (Note 6)
VZCD = 2 V to 0 V ramp,
dV/dt = 20 V/ms
VZCD = VZCD(TRIG) to VDRV = 90%
Falling VDRV = 10% to
Rising VDRV = 90%
VZCD(ARM)
VZCD(TRIG)
VZCD(HYS)
IZCD
VCL(POS)
VCL(NEG)
tZCD
tSYNC
tstart
1.25
0.6
500
−2
9.8
9.2
−0.9
−1.1
−
−
75
1.4
0.7
700
−
10
10
−0.7
−0.7
100
70
165
1.55
0.83
900
+2
12
12
−0.5
−0.5
170
−
300
V
V
mV
mA
V
V
ns
ns
ms
DRIVE
Drive Resistance
Isource = 100 mA
Isink = 100 mA
ROH − 12 20 W
ROL − 6 13
Rise Time
10% to 90%
trise − 35 80 ns
Fall Time
90% to 10%
tfall − 25 70 ns
Drive Low Voltage
VCC = VCC(on)−200 mV,
Isink = 10 mA
Vout(start)
−
−
0.2 V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. For coldest temperature, QA sampling at −40°C in production and −55°C specification is Guaranteed by Characterization.
www.onsemi.com
5
5 Page 
NCP1608
high frequency switching converter to regulate the input
current harmonics. Active circuits operate at a higher
frequency, which enables them to be physically smaller,
weigh less, and operate more efficiently than a passive
circuit. With proper control of an active PFC stage, almost
any complex load emulates a linear resistance, which
significantly reduces the harmonic current content. Active
PFC circuits are the most popular way to meet harmonic
content requirements because of the aforementioned
benefits. Generally, active PFC circuits consist of inserting
a PFC pre−converter between the rectifier bridge and the
bulk capacitor (Figure 26).
Rectifiers
PFC Pre−Converter
Converter
AC Line
High
+ Frequency
Bypass
Capacitor
NCP1608
+ Bulk
Storage
Capacitor
Load
Figure 26. Active PFC Pre−Converter with the NCP1608
The boost (or step up) converter is the most popular
topology for active power factor correction. With the
proper control, it produces a constant voltage while
consuming a sinusoidal current from the line. For medium
power (< 350 W) applications, CrM is the preferred control
method. CrM occurs at the boundary between
discontinuous conduction mode (DCM) and continuous
conduction mode (CCM). In CrM, the driver on time begins
when the boost inductor current reaches zero. CrM
operation is an ideal choice for medium power PFC boost
stages because it combines the reduced peak currents of
CCM operation with the zero current switching of DCM
operation. The operation and waveforms in a PFC boost
converter are illustrated in Figure 27.
AC Line
Diode Bridge
Vin
+
+
−
Diode Bridge
IL
Vin
+
L
+
Vdrain
AC Line
−
IL
Vdrain
L
+
Vout
The power switch is ON
With the power switch voltage being about zero, the
input voltage is applied across the inductor. The inductor
current linearly increases with a (Vin/L) slope.
Inductor
Current
Vin/L
IL(peak)
The power switch is OFF
The inductor current flows through the diode. The inductor volt-
age is (Vout − Vin) and the inductor current linearly decays with a
(Vout − Vin)/L slope.
(Vout − Vin)/L
Critical Conduction Mode:
Next current cycle starts
when the core is reset.
Vdrain
Vout
Vin
If next cycle does not start
then Vdrain rings towards Vin
Figure 27. Schematic and Waveforms of an Ideal CrM Boost Converter
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| PDF Descargar | [ Datasheet NCP1608BDR2G.PDF ] | |
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