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Número de pieza | NCP81143 | |
Descripción | Multiple-Phase Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NCP81143
Multiple-Phase Controller
with SVID Interface for
Desktop and Notebook CPU
Applications
The NCP81143 Multi−Phase buck solution is optimized for Intel
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VR12.5 compatible CPUs with user configurations of 3/2/1 phases
this controllers combines true differential voltage sensing, differential
inductor DCR current sensing, input voltage feed−forward, and
MARKING
DIAGRAM
adaptive voltage positioning to provide accurately regulated power for
both Desktop and Notebook applications. The control system is based
on Dual−Edge pulse−width modulation (PWM) combined with DCR
current sensing providing the fastest initial response to dynamic load
events at reduced system cost. They have the capability to shed to
single phase during light load operation and can auto frequency scale
1 36
QFN36
CASE 485CC
1
NCP
81143
AWLYYWWG
G
in light load conditions while maintaining excellent transient
performance.
The NCP81143 offers two internal MOSFET drivers with a single
external PWM signal. High performance operational error amplifiers
are provided to simplify compensation of the system. Patented
Dynamic Reference Injection further simplifies loop compensation by
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
eliminating the need to compromise between closed−loop transient
response and Dynamic VID performance. Patented Total Current
Summing provides highly accurate digital current monitoring.
Features
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 30 of this data sheet.
• NCP81143 and Meets Intel® VR12.5 specifications
• Current Mode Dual Edge Modulation for Fastest Initial Response to
Transient Loading
• High Performance Operational Error Amplifier
• Digital Soft Start Ramp
• Dynamic Reference Injection
• Accurate Total Summing Current Amplifier
• Power Saving Phase Shedding
• Dual High Impedance Differential Voltage and Total
• Vin Feed Forward Ramp Slope
Current Sense Amplifiers
• Phase−to−Phase Dynamic Current Balancing
• Over Voltage Protection (OVP) & Under Voltage
Protection (UVP)
• “Lossless” DCR Current Sensing for Current Balancing
• Over Current Protection (OCP)
• True Differential Current Balancing Sense Amplifiers
• VR−RDY Output with Internal Delays
for Each Phase
• Adaptive Voltage Positioning (AVP)
• Switching Frequency Range of 200 kHz –1 MHz
• Vin range 4.5 V to 25 V
• These are Pb−Free Devices
Applications
• Desktop & Notebook Processors
• Startup into Pre−Charged Loads While Avoiding False
OVP
© Semiconductor Components Industries, LLC, 2014
January, 2014 − Rev. 1
1
Publication Order Number:
NCP81143/D
1 page NCP81143
ENABLE 1
VR_HOT 2
SDIO 3
ALERT
SCLK
VR_RDY
ROSC
TSENSE
INT_SEL
4
5
6
7
8
9
NCP81143
TAB: GROUND
27 CSCOMP
26 CSSUM
25 CSREF
24 CSP3
23 CSP2
22 CSP1
21 DRON
20 PWM2/IMAX
19 BST3
Figure 4. NCP81143 Pin Configuration
NCP81143 SINGLE ROW PIN DESCRIPTIONS
Pin No.
Symbol
Description
1
ENABLE
Logic input. Logic high enables both outputs and logic low disables both outputs
2
VR_HOT#
Thermal logic output for over temperature
3
SDIO
Serial VID data interface
4
ALERT#
Serial VID ALERT#.
5
SCLK
Serial VID clock
6
VR_RDY
Open drain output. High indicates that the output is regulating
7
ROSC
A resistance from this pin to ground programs the oscillator frequency
8
TSENSE
Temp Sense input for the multiphase converter
9
INT_SEL
An input pin to adjust programmable integrator setting. During start up it is used to program
INT_SEL with a resistor to ground
10
BST1
High−Side bootstrap supply for phase 1.
11
HG1
High side gate driver output for phase 1
12
SW1
Current return for high side gate driver 1
13 LG1 Low−Side gate driver output for phase 1
14
PGND
Power Ground for gate drivers
15
PVCC
Power Supply for gate drivers
16 LG3 Low−Side gate driver output for phase 3
17
SW3
Current return for high side gate driver 3
18
HG3
High side gate driver output for phase 3
19
BST3
High−Side bootstrap supply for phase 3
20
PWM2/IMAX
Phase 2 PWM output. Also as ICC_MAX Input Pin. During start up it is used to program ICC_MAX
with a resistor to ground
21
DRON
Bidirectional gate drive enable output
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5
5 Page NCP81143
NCP81143 ELECTRICAL CHARACTERISTICS
Unless otherwise stated: −40°C < TA < 125°C; VCC = 5 V; CVCC = 0.1 mF
Parameter
Test Conditions
Min Typ Max Unit
PWM OUTPUTS
Output High Voltage
Sourcing 500 mA
V0C.2CV–
V
Output Mid Voltage
No Load, SetPS = 02
1.9 2.0 2.1
V
Output Low Voltage
Sinking 500 mA
0.7 V
Rise and Fall Time
PHASE DETECTION
CL (PCB) = 50 pF,
DVo = GND to VCC
10 ns
CSP Pin Threshold voltage
4.5 V
Phase Detect Timer
100 ms
SCLK, SDIO
VIL
VIH
VOH
Leakage Current
Pad Capacitance, (Note 3)
Input Low Voltage
Input High Voltage
Output High Voltage
0.45
0.65
1.05
−1 1
4.0
V
V
V
mA
pF
VR clock to data delay (Tco), (Note 3)
4 8.3 ns
Setup time (Tsu), (Note 3)
7 ns
Hold time (Thld), (Note 3)
14 ns
HIGH−SIDE MOSFET DRIVER
Pull−up Resistance, Sourcing Current
High Side Driver Sourcing Current
BST = PVCC
BST = PVCC
1.2 3.1
4.17
W
A
Pull−down Resistance, Sinking Current
BST = PVCC
0.8 2.5
W
High Side Driver Sinking Current
BST = PVCC
6.25 A
HGx Rise Time
VCC = 5 V, 3 nF load, BST−SW = 5 V
6
16 30 ns
HGx Fall Time
VCC = 5 V, 3 nF load, BST−SW = 5 V
6
11 30 ns
HGx Turn on Propagation Delay tpdhDRVH
SWx Pull−Down Resistance
CLOAD = 3 nF
SW to PGND
+ 30 47 ns
2 kW
LOW−SIDE MOSFET DRIVER
Pull−up Resistance, Sourcing Current
0.9 3.4
W
Low Side Driver Sourcing Current
5.56 A
Pull−down Resistance, Sinking Current
Low Side Driver Sinking Current
0.4 2.0
12.5
W
A
LGx Rise Time
3 nF load
6 16 30 ns
LGx Fall Time
3 nF load
6 11 30 ns
LGx Turn−On Propagation
Delay tpdhDRVL
CLOAD = 3 nF
11 30 ns
PVCC Quiescent Current
EN = L (Shutdown)
EN = H, no switching
1.0 15
490
mA
BOOTSTRAP ON RESISTANCE
ON Resistance
EN = L or EN = H with DRVL = H
5 9 21 W
3. Guaranteed by design or characterization data, not in production test.
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11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet NCP81143.PDF ] |
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