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PDF CAT24C128 Data sheet ( Hoja de datos )
| Número de pieza | CAT24C128 | |
| Descripción | 128kb I2C CMOS Serial EEPROM | |
| Fabricantes | ON Semiconductor | |
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CAT24C128
128 kb I2C CMOS Serial
EEPROM
Description
The CAT24C128 is a 128 kb Serial CMOS EEPROM, internally
organized as 16,384 words of 8 bits each.
It features a 64−byte page write buffer and supports both the
Standard (100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I2C
protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
On−Chip ECC (Error Correction Code) makes the device suitable
for high reliability applications.*
Features
• Supports Standard, Fast and Fast−Plus I2C Protocol
• 1.8 V to 5.5 V Supply Voltage Range
• 64−Byte Page Write Buffer
• Hardware Write Protection for Entire Memory
• Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Range
• 8−lead PDIP, SOIC, TSSOP, MSOP and UDFN Packages
• This Device is Pb−Free, Halogen Free/BFR Free and RoHS
Compliant**
VCC
SCL
A2, A1, A0
WP
CAT24C128
SDA
VSS
Figure 1. Functional Symbol
*Available for New Product (Rev. C)
** For additional information on our Pb−Free strategy and soldering details,
please download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
PDIP−8
L SUFFIX
CASE 646AA
UDFN−8
HU4 SUFFIX
CASE 517AZ
TSSOP−8
Y SUFFIX
CASE 948AL
SOIC−8
W SUFFIX
CASE 751BD
MSOP−8
Z SUFFIX
CASE 846AD
UDFN−8***
HU3 SUFFIX
CASE 517AX
PIN CONFIGURATION
A0 1
A1
VCC
WP
A2 SCL
VSS SDA
PDIP (L), SOIC (W), TSSOP (Y), MSOP
(Z), UDFN (HU3***), UDFN (HU4)
For the location of Pin 1, please consult the
corresponding package drawing.
*** Not recommended for new design.
PIN FUNCTION
Pin Name†
Function
A0, A1, A2
SDA
Device Address Inputs
Serial Data Input/Output
SCL Serial Clock Input
WP Write Protect Input
VCC Power Supply
VSS Ground
†The exposed pad for the TDFN/UDFN packages can
be left floating or connected to Ground.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 15
1
Publication Order Number:
CAT24C128/D
1 page  
CAT24C128
Power−On Reset (POR)
The CAT24C128 incorporates Power−On Reset (POR)
circuitry which protects the device against powering up in
the wrong state.
The CAT24C128 will power up into Standby mode after
VCC exceeds the POR trigger level and will power down into
Reset mode when VCC drops below the POR trigger level.
This bi−directional POR feature protects the device against
‘brown−out’ failure following a temporary loss of power.
Pin Description
SCL: The Serial Clock input pin accepts the Serial Clock
generated by the Master.
SDA: The Serial Data I/O pin receives input data and
transmits data stored in EEPROM. In transmit mode, this pin
is open drain. Data is acquired on the positive edge, and is
delivered on the negative edge of SCL.
A0, A1 and A2: The Address pins accept the device address.
When not driven, these pins are pulled LOW internally.
WP: The Write Protect input pin inhibits all write
operations, when pulled HIGH. When not driven, this pin is
pulled LOW internally.
Functional Description
The CAT24C128 supports the Inter−Integrated Circuit
(I2C) Bus data transmission protocol, which defines a device
that sends data to the bus as a transmitter and a device
receiving data as a receiver. Data flow is controlled by a
Master device, which generates the serial clock and all
START and STOP conditions. The CAT24C128 acts as a
Slave device. Master and Slave alternate as either
transmitter or receiver. Up to 8 devices may be connected to
the bus as determined by the device address inputs A0, A1,
and A2.
I2C Bus Protocol
The I2C bus consists of two ‘wires’, SCL and SDA. The
two wires are connected to the VCC supply via pull−up
resistors. Master and Slave devices connect to the 2−wire
bus via their respective SCL and SDA pins. The transmitting
device pulls down the SDA line to ‘transmit’ a ‘0’ and
releases it to ‘transmit’ a ‘1’.
Data transfer may be initiated only when the bus is not
busy (see A.C. Characteristics).
During data transfer, the SDA line must remain stable
while the SCL line is HIGH. An SDA transition while SCL
is HIGH will be interpreted as a START or STOP condition
(Figure 2). The START condition precedes all commands. It
consists of a HIGH to LOW transition on SDA while SCL
is HIGH. The START acts as a ‘wake−up’ call to all
receivers. Absent a START, a Slave will not respond to
commands. The STOP condition completes all commands.
It consists of a LOW to HIGH transition on SDA while SCL
is HIGH.
Device Addressing
The Master initiates data transfer by creating a START
condition on the bus. The Master then broadcasts an 8−bit
serial Slave address. The first 4 bits of the Slave address are
set to 1010, for normal Read/Write operations (Figure 3).
The next 3 bits, A2, A1 and A0, select one of 8 possible Slave
devices and must match the state of the external address pins.
The last bit, R/W, specifies whether a Read (1) or Write (0)
operation is to be performed.
Acknowledge
After processing the Slave address, the Slave responds
with an acknowledge (ACK) by pulling down the SDA line
during the 9th clock cycle (Figure 4). The Slave will also
acknowledge all address bytes and every data byte presented
in Write mode. In Read mode the Slave shifts out a data byte,
and then releases the SDA line during the 9th clock cycle. As
long as the Master acknowledges the data, the Slave will
continue transmitting. The Master terminates the session by
not acknowledging the last data byte (NoACK) and by
issuing a STOP condition. Bus timing is illustrated in
Figure 5.
http://onsemi.com
5
5 Page 
PIN # 1
IDENTIFICATION
TOP VIEW
CAT24C128
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
E1 E
SYMBOL
A
A1
b
c
D
E
E1
e
h
L
θ
MIN
1.35
0.10
0.33
0.19
4.80
5.80
3.80
0.25
0.40
0º
NOM
1.27 BSC
MAX
1.75
0.25
0.51
0.25
5.00
6.20
4.00
0.50
1.27
8º
D
A1
A
eb
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
h
θ
L
END VIEW
c
http://onsemi.com
11
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| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CAT24C128.PDF ] | |
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