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PDF CAT93C86 Data sheet ( Hoja de datos )
| Número de pieza | CAT93C86 | |
| Descripción | 16Kb Microwire Serial EEPROM | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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CAT93C86
16 Kb Microwire Serial
EEPROM
Description
The CAT93C86 is a 16 Kb Serial EEPROM memory device which
is configured as either registers of 16 bits (ORG pin at VCC) or 8 bits
(ORG pin at GND). Each register can be written (or read) serially by
using the DI (or DO) pin. The CAT93C86 is manufactured using
ON Semiconductor’s advanced CMOS EEPROM floating gate
technology. The device is designed to endure 1,000,000 program/erase
cycles and has a data retention of 100 years. The device is available in
8−pin DIP and 8−pin SOIC packages.
Features
• High Speed Operation: 3 MHz / VCC = 5 V
• Low Power CMOS Technology
• 1.8 V to 5.5 V Operation
• Selectable x8 or x16 Memory Organization
• Self−timed Write Cycle with Auto−clear
• Hardware and Software Write Protection
• Power−up Inadvertent Write Protection
• Sequential Read
• Program Enable (PE) Pin
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Ranges
• 8−lead PDIP and SOIC Packages
• These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
ORG
CS
SK
PE
CAT93C86
DI
DO
GND
Figure 1. Functional Symbol
Note: When the ORG pin is connected to VCC, the x16 organization
is selected. When it is connected to ground, the x8 pin is selected. If
the ORG pin is left unconnected, then an internal pull−up device will
select the x16 organization.
www.onsemi.com
SOIC−8
V, W SUFFIX
CASE 751BD
PDIP−8
L SUFFIX
CASE 646AA
SOIC−8
X SUFFIX
CASE 751BE
PIN CONFIGURATION
CS 1
SK
DI
DO
VCC
PE
ORG
GND
PDIP (L), SOIC (V, X)
PE 1
VCC
CS
SK
ORG
GND
DO
DI
SOIC (W)*
Pin Name
CS
SK
DI
DO
VCC
GND
ORG
PE
PIN FUNCTION
Function
Chip Select
Clock Input
Serial Data Input
Serial Data Output
Power Supply
Ground
Memory Organization
Program Enable
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
* Not Recommended for New Designs
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 13
1
Publication Order Number:
CAT93C86/D
1 page  
CAT93C86
tSKHI
tSKLOW
tCSH
SK
tDIS
DI VALID
tCSS
CS
VALID
tDIH
tDIS
tPD0, tPD1
tCSMIN
DO DATA VALID
Figure 2. Synchronous Data Timing
SK
111 1 111 11 1 11 111
CS
AN AN−1
DI 1 1 0
A0
Don’t Care
HIGH−Z
DO
Dummy 0
D15 . . . D0
or
D7 . . . D0
Address + 1
D15 . . . D0
or
D7 . . . D0
Address + 2
D15 . . . D0
or
D7 . . . D0
Address + n
D15 . . .
or
D7 . . .
Figure 3. Read Instruction Timing
SK
CS
AN AN−1
DI 1 0 1
tCSMIN
A0 DN
D0
STATUS
VERIFY
STANDBY
tSV BUSY
tHZ
HIGH−Z
DO
READY
HIGH−Z
tEW
Figure 4. Write Instruction Timing
www.onsemi.com
5
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet CAT93C86.PDF ] | |
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