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PDF NCV7349 Data sheet ( Hoja de datos )
| Número de pieza | NCV7349 | |
| Descripción | High Speed Low Power CAN Transceiver | |
| Fabricantes | ON Semiconductor | |
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NCV7349
High Speed Low Power CAN
Transceiver
Description
The NCV7349 CAN transceiver is the interface between
a controller area network (CAN) protocol controller and the physical
bus. The transceiver provides differential transmit capability to the bus
and differential receive capability to the CAN controller.
The NCV7349 is a new addition to the CAN high−speed transceiver
family complementing NCV734x CAN family and previous generations
of CAN transceivers such as AMIS42665, AMIS3066x, etc.
Due to the wide common−mode voltage range of the receiver inputs
and other design features, the NCV7349 is able to reach outstanding
levels of electromagnetic susceptibility (EMS). Similarly, very low
electromagnetic emission (EME) is achieved by the excellent
matching of the output signals.
Features
• Compatible with the ISO 11898−5 Standard
• High Speed (up to 1 Mbps)
• VIO Pin on NCV7349−3 Version Allowing Direct Interfacing with
3 V to 5 V Microcontrollers
• Very Low Current Standby Mode with Wake−up via the Bus
• Low Electromagnetic Emission (EME) and Extremely High
Electromagnetic Immunity
• Very Low EME without Common−mode (CM) Choke
• No Disturbance of the Bus Lines with an Un−powered Node
• Transmit Data (TxD) Dominant Time−out Function
• Under All Supply Conditions the Chip Behaves Predictably
• Very High ESD Robustness of Bus Pins, >10 kV System ESD Pulses
• Thermal Protection
• Bus Pins Short Circuit Proof to Supply Voltage and Ground
• Bus Pins Protected Against Transients in an Automotive
• These are Pb−Free Devices
Quality
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
Typical Applications
• Automotive
• Industrial Networks
www.onsemi.com
8
1
SOIC−8
CASE 751AZ
MARKING
DIAGRAM
8
NV7349−x
ALYW G
G
1
NV7349−x = Specific Device Code
x = 0 or 3
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
1
TxD
2
GND
3
VCC
4
RxD
8
STB
7
CANH
6
CANL
5
NC
NCV7349D10R2G
(Top View)
1
TxD
2
GND
3
VCC
4
RxD
NCV7349D13R2G
(Top View)
8
STB
7
CANH
6
CANL
5
VIO
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
December, 2014 − Rev. 1
1
Publication Order Number:
NCV7349/D
1 page  
NCV7349
Over−temperature Detection
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 170°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC is reduced. All other
IC functions continue to operate. The transmitter off−state
resets when the temperature decreases below the shutdown
threshold and pin TxD goes high. The thermal protection
circuit is particularly needed when a bus line short circuits.
TxD Dominant Time−out Function
A TxD dominant time−out timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on pin TxD exceeds the
internal timer value tdom(TxD), the transmitter is disabled,
driving the bus into a recessive state. The timer is reset by a
positive edge on pin TxD.
This TxD dominant time−out time (tdom(TxD)) defines the
minimum possible bit rate to 15 kbps.
Fail Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
Undervoltage on VCC pin prevents the chip sending data
on the bus when there is not enough VCC supply voltage.
After supply is recovered TxD pin must be first released to
high to allow sending dominant bits again. Recovery time
from undervoltage detection is equal to td(stb−nm) time.
VIO supply dropping below VUVDVIO undervoltage
detection level will cause the transmitter to disengage from
the bus (no bus loading) until the VIO voltage recovers
(NCV7349−3 version only).
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637; see
Figure 7). Pins TxD and STB are pulled high internally
should the input become disconnected. Pins TxD, STB and
RxD will be floating, preventing reverse supply should the
VIO supply be removed.
www.onsemi.com
5
5 Page 
NCV7349
PACKAGE DIMENSIONS
SOIC 8
CASE 751AZ
ISSUE A
www.onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NCV7349.PDF ] | |
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