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PDF CAV25320 Data sheet ( Hoja de datos )
| Número de pieza | CAV25320 | |
| Descripción | EEPROM | |
| Fabricantes | ON Semiconductor | |
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CAV25320
32-Kb SPI Serial CMOS
EEPROM
Description
The CAV25320 is a 32−Kb Serial CMOS EEPROM device
internally organized as 4096x8 bits. This features a 32−byte page write
buffer and supports the Serial Peripheral Interface (SPI) protocol. The
device is enabled through a Chip Select (CS) input. In addition, the
required bus signals are clock input (SCK), data input (SI) and data
output (SO) lines. The HOLD input may be used to pause any serial
communication with the CAV25320 device. The device features
software and hardware write protection, including partial as well as
full array protection.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 2.5 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 32−byte Page Write Buffer
• Self−timed Write Cycle
• Hardware and Software Protection
• CAV Prefix for Automotive and Other Applications Requiring Site
and Change Control
• Block Write Protection
− Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• SOIC and TSSOP 8−lead Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SI
CS
WP
HOLD
SCK
CAV25320
SO
VSS
Figure 1. Functional Symbol
http://onsemi.com
SOIC−8
V SUFFIX
CASE 751BD
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
CS 1
SO
WP
VSS
VCC
HOLD
SCK
SI
SOIC (V), TSSOP (Y)
Pin Name
CS
SO
WP
VSS
SI
SCK
HOLD
VCC
PIN FUNCTION
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
October, 2013 − Rev. 1
1
Publication Order Number:
CAV25320/D
1 page  
CAV25320
Status Register
The Status Register, as shown in Table 8, contains a
number of status and control bits.
The RDY (Ready) bit indicates whether the device is busy
with a write operation. This bit is automatically set to 1 during
an internal write cycle, and reset to 0 when the device is ready
to accept commands. For the host, this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is in a
Write Enable state and when set to 0, the device is in a Write
Disable state.
The BP0 and BP1 (Block Protect) bits determine which
blocks are currently write protected. They are set by the user
with the WRSR command and are non−volatile. The user is
allowed to protect a quarter, one half or the entire memory,
by setting these bits according to Table 9. The protected
blocks then become read−only.
The WPEN (Write Protect Enable) bit acts as an enable for
the WP pin. Hardware write protection is enabled when the
WP pin is low and the WPEN bit is 1. This condition
prevents writing to the status register and to the block
protected sections of memory. While hardware write
protection is active, only the non−block protected memory
can be written. Hardware write protection is disabled when
the WP pin is high or the WPEN bit is 0. The WPEN bit, WP
pin and WEL bit combine to either permit or inhibit Write
operations, as detailed in Table 10.
Table 8. STATUS REGISTER
76
WPEN
0
5
0
4 3 2 10
0
BP1
BP0
WEL
RDY
Table 9. BLOCK PROTECTION BITS
Status Register Bits
BP1 BP0
00
01
10
11
Array Address Protected
None
0C00−0FFF
0800−0FFF
0000−0FFF
Protection
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
Table 10. WRITE PROTECT CONDITIONS
WPEN
WP
0X
0X
1 Low
1 Low
X High
X High
WEL
0
1
0
1
0
1
Protected Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status Register
Protected
Writable
Protected
Protected
Protected
Writable
http://onsemi.com
5
5 Page 
PIN # 1
IDENTIFICATION
TOP VIEW
CAV25320
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
E1 E
SYMBOL
A
A1
b
c
D
E
E1
e
h
L
θ
MIN
1.35
0.10
0.33
0.19
4.80
5.80
3.80
0.25
0.40
0º
NOM
1.27 BSC
MAX
1.75
0.25
0.51
0.25
5.00
6.20
4.00
0.50
1.27
8º
D
A1
A
eb
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
h
θ
L
END VIEW
c
http://onsemi.com
11
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet CAV25320.PDF ] | |
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