CAV25020 PDF даташит
Спецификация CAV25020 изготовлена «ON Semiconductor» и имеет функцию, называемую «EEPROM». |
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Детали детали
Номер произв | CAV25020 |
Описание | EEPROM |
Производители | ON Semiconductor |
логотип |
12 Pages
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CAV25010, CAV25020,
CAV25040
1-Kb, 2-Kb and 4-Kb SPI
Serial CMOS EEPROM
Description
The CAV25010/20/40 are 1−Kb/2−Kb/4−Kb Serial CMOS
EEPROM devices internally organized as 128x8/256x8/512x8 bits.
They feature a 16−byte page write buffer and support the Serial
Peripheral Interface (SPI) protocol. The device is enabled through a
Chip Select (CS) input. In addition, the required bus signals are a clock
input (SCK), data input (SI) and data output (SO) lines. The HOLD
input may be used to pause any serial communication with the
CAV25010/20/40 device. These devices feature software and
hardware write protection, including partial as well as full array
protection.
Features
• Automotive Temperature Grade 1 (−40°C to +125°C)
• 10 MHz SPI Compatible
• 2.5 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 16−byte Page Write Buffer
• Self−timed Write Cycle
• Hardware and Software Protection
• Block Write Protection
− Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Range
• SOIC and TSSOP 8−Lead Packages
• These Devices are Pb−Free, Halogen Free/BFR Free, and RoHS
Compliant
VCC
SI
CS
WP
HOLD
SCK
CAV25010
CAV25020
CAV25040
SO
VSS
Figure 1. Functional Symbol
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SOIC−8
V SUFFIX
CASE 751BD
TSSOP−8
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
CS 1
SO
VCC
HOLD
WP SCK
VSS SI
SOIC (V), TSSOP (Y)
For the location of Pin 1, please consult the
corresponding package drawing.
Pin Name
CS
SO
WP
VSS
SI
SCK
HOLD
VCC
PIN FUNCTION
Function
Chip Select
Serial Data Output
Write Protect
Ground
Serial Data Input
Serial Clock
Hold Transmission Input
Power Supply
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
January, 2012 − Rev. 0
1
Publication Order Number:
CAV25010/D
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25xx0E
AYMXXX
G
(SOIC−8)
CAV25010, CAV25020, CAV25040
MARKING DIAGRAMS
25010E = CAV25010
25020E = CAV25020
25040E = CAV25040
A = Assembly Location
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
XXX = Last Three Digits of
XXX = Assembly Lot Number
G = Pb−Free Package
SxxE
AYMXXX
G
(TSSOP−8)
S01E = CAV25010
S02E = CAV25020
S04E = CAV25040
A = Assembly Location
Y = Production Year (Last Digit)
M = Production Month (1−9, O, N, D)
XXX = Last Three Digits of
XXX = Assembly Lot Number
G = Pb−Free Package
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
Operating Temperature
−45 to +130
°C
Storage Temperature
−65 to +150
°C
Voltage on any Pin with Respect to Ground (Note 1)
−0.5 to VCC + 0.5
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol
Parameter
NEND (Note 3)
TDR
Endurance
Data Retention
Min
1,000,000
100
Units
Program / Erase Cycles
Years
Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min Max Units
ICCR
ICCW
ISB1
ISB2
IL
ILO
Supply Current (Read Mode)
Supply Current (Write Mode)
Standby Current
Standby Current
Input Leakage Current
Output Leakage Current
Read, VCC = 5.5 V, 10 MHz, SO open
Write, VCC = 5.5 V, 10 MHz, SO open
VIN = GND or VCC, CS = VCC,
WP = VCC, VCC = 5.5 V
VIN = GND or VCC, CS = VCC,
WP = GND, VCC = 5.5 V
VIN = GND or VCC
CS = VCC,
VOUT = GND or VCC
2 mA
2 mA
2 mA
5 mA
−2 2 mA
−1 2 mA
VIL Input Low Voltage
VIH Input High Voltage
VOL Output Low Voltage
VOH Output High Voltage
IOL = 3.0 mA
IOH = −1.6 mA
−0.5
0.7 VCC
VCC − 0.8 V
0.3 VCC
VCC + 0.5
0.4
V
V
V
V
Table 4. PIN CAPACITANCE (Note 2) (TA = 25°C, f = 1.0 MHz, VCC = +5.0 V)
Symbol
Test
Conditions
Min Typ Max Units
COUT
Output Capacitance (SO)
VOUT = 0 V
8 pF
CIN Input Capacitance (CS, SCK, SI, WP, HOLD)
VIN = 0 V
8 pF
1. The DC input voltage on any pin should not be lower than −0.5 V or higher than VCC + 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns.
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
and JEDEC test methods.
3. Page Mode, VCC = 5 V, 25°C.
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CAV25010, CAV25020, CAV25040
Table 5. A.C. CHARACTERISTICS (TA = −40°C to +125°C) (Note 4)
VCC = 2.5 V − 5.5 V
Symbol
Parameter
Min Max
fSCK
Clock Frequency
DC 10
tSU Data Setup Time
10
tH Data Hold Time
10
tWH SCK High Time
40
tWL SCK Low Time
40
tLZ HOLD to Output Low Z
25
tRI (Note 5)
Input Rise Time
2
tFI (Note 5)
Input Fall Time
2
tHD HOLD Setup Time
0
tCD HOLD Hold Time
10
tV Output Valid from Clock Low
35
tHO Output Hold Time
0
tDIS Output Disable Time
20
tHZ HOLD to Output High Z
25
tCS CS High Time
40
tCSS
CS Setup Time
30
tCSH
CS Hold Time
30
tCNS
CS Inactive Setup Time
20
tCNH
CS Inactive Hold Time
20
tWPS
WP Setup Time
10
tWPH
WP Hold Time
10
tWC (Note 6)
Write Cycle Time
5
4. AC Test Conditions:
Input Pulse Voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: ≤ 10 ns
Input and output reference voltages: 0.5 VCC
Output load: current source IOL max/IOH max; CL = 30 pF
5. This parameter is tested initially and after a design or process change that affects the parameter.
6. tWC is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
Units
MHz
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Table 6. POWER−UP TIMING (Notes 7, 8)
Symbol
Parameter
tPUR
Power−up to Read Operation
tPUW
Power−up to Write Operation
7. This parameter is tested initially and after a design or process change that affects the parameter.
Min
0.1
0.1
Max Units
1 ms
1 ms
8. tPUR and tPUW are the delays required from the time VCC is stable at the operating voltage until the specified operation can be initiated.
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