|
|
PDF NCV51510 Data sheet ( Hoja de datos )
| Número de pieza | NCV51510 | |
| Descripción | Termination Source / Sink Regulator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NCV51510 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
NCP51510, NCV51510
3 Amp VTT Termination
Source / Sink Regulator for
DDR, DDR-2, DDR-3, DDR-4
The NCP51510 is a source/sink Double Data Rate (DDR)
termination regulator specifically designed for low input voltage and
low−noise systems where space is a key consideration. The
NCP51510 maintains a fast transient response and only requires a
minimum VTT load capacitance of 10 mF for output stability. The
NCP51510 supports remote sensing and all power requirements for
DDR VTT bus termination. The NCP51510 can also be used in
low−power chipsets and graphics processor cores that require
dynamically adjustable output voltages. The NCP51510 is available in
the thermally−efficient DFN10 Exposed Pad package, and is rated
both Green and Pb−Free.
Features
• Generate DDR Memory Termination Voltage (VTT)
• For DDR, DDR−2, DDR−3 and DDR−4 Source / Sink Currents
• Supports Loads Up to ±3 A (Typ), Output is Over−Current Protected
• Integrated MOSFETs with Thermal Shutdown Protection
• Fast Load−Transient Response
• PGOOD Output Pin to Monitor Status of VTT Output Regulation
• SS Input Pin for Suspend Shutdown mode
• VRI Input Reference for Flexible Voltage Tracking
• VTTS Input for Remote Sensing (Kelvin Connection)
• Built−in Soft−Start, Under Voltage Lockout
• Small, Low−Profile 10−pin, 3 x 3 mm DFN Package
• NCV51510MWTAG − Wettable Flank Option for Enhanced Optical
Inspection
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable*
• This is a Pb−Free Device
Applications
• DDR Memory Termination
• Desktop PC’s, Notebooks, and Workstations
• Servers and Networking equipment
• Telecom/Datacom, GSM Base Station
• Graphics Processor Core Supplies
• Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers
• Supplies Power for Chipset/RAM as Low as 0.5 V
• Active Source/Sink Bus Termination
www.onsemi.com
DFN10
CASE 485C
MARKING DIAGRAM
51510
ALYWG
G
51510 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
VRO 1
VCC 2
AGND 3
VRI 4
PGOOD 5
GND
(Top View)
10 PVCC
9 VTT
8 PGND
7 SS
6 VTTS
ORDERING INFORMATION
Device
Package Shipping†
NCP51510MNTAG
NCV51510MNTAG*
NCV51510MWTAG*
DFN10
(Pb−Free)
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 2
1
Publication Order Number:
NCP51510/D
1 page  
NCP51510, NCV51510
General*
The NCP51510 is a source/sink tracking termination
regulator specifically designed for low input voltage and
low external component count systems where space is a key
application parameter. The NCP51510 integrates a
high−performance, low−dropout (LDO) linear regulator
that is capable of both sourcing and sinking current. The
LDO regulator employs a fast feedback loop so that small
ceramic capacitors can be used to support the fast load
transient response. To achieve tight regulation with
minimum effect of trace resistance, a remote sensing input
(VTTS) should be connected to the positive terminal of the
output capacitors as a separate trace from the high current
path of the VTT output.
Generation of Internal Voltage Reference
The VTT output voltage is regulated to (and tracks with)
the voltage on the VRI Reference input. When the VRI input
is configured for standard DDR termination applications,
the VRI Reference input can be set by an external equivalent
ratio voltage divider connected to the memory supply bus
(VDDQ). The NCP51510 supports VTT voltages from 0.5 V
to 1.5 V.
Generation of Internal Voltage Reference (cont)
When the VRO output is configured for DDR termination
applications, it provides a separate VTT output reference
voltage for the memory application. The VRO Reference
Output pin is a buffered version of the VRI Reference Input,
and is capable of sourcing and sinking a load of ±5 mA. The
VRO output becomes active when the VRI input > 0.45 V
and the VCC power rail is above the UVLO threshold. The
VRO Reference Output is independent of the SS pin
(Suspend Shutdown) state.
Fault Detection and Shutdown Function
When the SS “Suspend Shutdown” input pin is driven
high, the NCP51510 regulator begins normal operation,
with the Soft Start circuit gradually increasing output
current during the first 200 ms in order to reduce the input
surge currents at startup, with full current available after the
200 ms Soft−Start circuitry has timed out.
When the SS input is driven low, the VTT output is
discharged to PGND through an internal 8 W MOSFET. The
VRO output remains on when the SS input is driven low. The
NCP51510 provides an open−drain PGOOD “Power Good”
output that goes high when the VTTS Sense input is within
±150 mV of the VRI Reference Input. The PGOOD output
de−asserts within 10 ms after the VTTS Sense input exceeds
the size of the PGOOD window. During initial VTT startup,
PGOOD asserts high 2 ms after the VTTS Sense input enters
PGOOD window. Because the PGOOD output is open−drain,
an external pull−up resistor is required (100 kW*) between
PGOOD and a stable active supply voltage rail.
Thermal Shutdown with Hysteresis
If the NCP51510 is to operate in elevated temperatures for
long durations, care should be taken to ensure that the
maximum operating junction temperature is not exceeded.
To guarantee safe operation, the NCP51510 provides
on−chip thermal shutdown protection. When the chip
junction temperature exceeds 165°C*, the part will
shutdown. When the junction temperature falls back, to
150°C*, the device resumes normal operation. If the
junction temperature exceeds the thermal shutdown
threshold, the VTT output is shut off, discharged by the 8 W
internal discharge MOSFET.
Output Capacitor
Output stability is guaranteed for VTT output capacitance
COUT from 10 mF to 220 mF. The ESR of COUT between
2 mW and 50 mW is required to maintain stability. Use the
formula below to calculate the application’s transient
response:
DITT(pp) ESR + DVTT(pp)
Where:
DITT(pp) is the maximum peak−to−peak load current delta
and DVTT(pp) is the allowable peak−to−peak voltage
tolerance.
*Typical values are used with the application description text. Please refer to the Electrical Specifications Table for a more detailed list of MIN,
MAX and TYPICAL values.
www.onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet NCV51510.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NCV51510 | Termination Source / Sink Regulator | ON Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |