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PDF NCV4279C Data sheet ( Hoja de datos )

Número de pieza NCV4279C
Descripción 5.0V Micropower 150mA LDO Linear Regulator
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No Preview Available ! NCV4279C Hoja de datos, Descripción, Manual

NCV4279C
5.0 V Micropower 150 mA
LDO Linear Regulator with
DELAY, Adjustable RESET,
and Sense Output
The NCV4279C is a 5.0 V precision micropower voltage regulator
with an output current capability of 150 mA.
The output voltage is accurate within ±2.0% with a maximum
dropout voltage of 0.5 V at 100 mA. Low quiescent current is a feature
drawing only 125 mA with a 1.0 mA load. This part is ideal for any and
all battery operated microprocessor equipment.
Microprocessor control logic includes an active reset output RO
with delay and a SI/SO monitor which can be used to provide an early
warning signal to the microprocessor of a potential impending reset
signal. The use of the SI/SO monitor allows the microprocessor to
finish any signal processing before the reset shuts the microprocessor
down.
The active Reset circuit operates correctly at an output voltage as
low as 1.0 V. The Reset function is activated during the power up
sequence or during normal operation if the output voltage drops
outside the regulation limits.
The reset threshold voltage can be decreased by the connection of an
external resistor divider to the RADJ lead. The regulator is protected
against reverse battery, short circuit, and thermal overload conditions.
The device can withstand load dump transients making it suitable for
use in automotive environments. The device has also been optimized
for EMC conditions.
If the application requires pullup resistors at the logic outputs Reset
and Sense Out, the NCV4269C with integrated resistors can be used.
Features
5.0 V ± 2.0% Output
Low 125 mA Quiescent Current
Active Reset Output Low Down to VQ = 1.0 V
Adjustable Reset Threshold
150 mA Output Current Capability
Fault Protection
+60 V Peak Transient Voltage
−40 V Reverse Voltage
Short Circuit
Thermal Overload
Early Warning through SI/SO Leads
Internally Fused Leads in SO−14 Package
Very Low Dropout Voltage
Electrical Parameters Guaranteed Over Entire Temperature Range
AEC−Q100 Grade 1 Qualified and PPAP Capable
These are Pb−Free Devices
www.onsemi.com
8
1
14
1
MARKING
DIAGRAMS
SO−8
D1 SUFFIX
CASE 751
8
4279C5
ALYW
G
1
14
SO−14
D2 SUFFIX
CASE 751A
NCV4279C5G
AWLYWW
1
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G = PB−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 4
1
Publication Order Number:
NCV4279C/D

1 page




NCV4279C pdf
II
1000 mF
CI
470 nF
VI
VSI
NCV4279C
I
ISI
SI
D
GND RO
IQ
Q
RADJ1
RADJ
SO
IRADJ
CQ
22 mF
RSO RRO
VQ
ID Iq VRO VSO
VRADJ
CD
100 nF
VD
RADJ2
Figure 2. Measuring Circuit
VI
VQ
VRT
< tRR
VD
VUD
VLD
VRO
VRO,SAT
td
tRR
dV
dt
+
ID
CD
Power−on−Reset
Thermal
Shutdown
Voltage Dip
at Input
Undervoltage
Secondary Overload
Spike
at Output
Figure 3. Reset Timing Diagram
t
t
t
t
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NCV4279C arduino
NCV4279C
SENSE INPUT (SI) / SENSE OUTPUT (SO) VOLTAGE
MONITOR
An on−chip comparator is available to provide early
warning to the microprocessor of a possible reset signal. The
output is from an open collector driver. The reset signal
typically turns the microprocessor off instantaneously. This
can cause unpredictable results with the microprocessor.
The signal received from the SO pin will allow the
microprocessor time to complete its present task before
shutting down. This function is performed by a comparator
referenced to the band gap voltage. The actual trip point can
be programmed externally using a resistor divider to the
input monitor SI (Figure 21). The values for RSI1 and RSI2
are selected for a typical threshold of 1.20 V on the SI Pin.
SIGNAL OUTPUT
Figure 22 shows the SO Monitor timing waveforms as a
result of the circuit depicted in Figure 21. As the output
voltage (VQ) falls, the monitor threshold (VSILOW), is
crossed. This causes the voltage on the SO output to go low
sending a warning signal to the microprocessor that a reset
signal may occur in a short period of time. TWARNING is the
time the microprocessor has to complete the function it is
currently working on and get ready for the reset
shutdown signal. When the voltage on the SO goes low and
the RO stays high the current consumption is typically
560 mA at 1 mA load current.
VQ
SI
VSI,Low
VRO
SO
TWARNING
Figure 22. SO Warning Waveform Time Diagram
STABILITY CONSIDERATIONS
The input capacitor CI in Figure 21 is necessary for
compensating input line reactance. Possible oscillations
caused by input inductance and input capacitance can be
damped by using a resistor of approximately 1.0 W in series
with CI.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. The
aluminum electrolytic capacitor is the least expensive
solution, but, if the circuit operates at low temperatures
(−25°C to −40°C), both the value and ESR of the capacitor
will vary considerably. The capacitor manufacturer’s data
sheet usually provides this information.
The 10 mF output capacitor CQ shown in Figure 21 should
work for most applications; however, it is not necessarily the
optimized solution. Stability is guaranteed at CQ is min
2.2 mF and max ESR is 2.5 W. There is no min ESR limit
which was proved with MURATA’s ceramic caps
GRM31MR71A225KA01 (2.2 mF, 10 V, X7R, 1206) and
GRM31CR71A106KA01 (10 mF, 10 V, X7R, 1206) directly
soldered between output and ground pins.
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 21) is:
PD(max) + [VI(max) * VQ(min)] IQ(max) ) VI(max) Iq (eq. 4)
where:
VI(max) is the maximum input voltage,
VQ(min) is the minimum output voltage,
IQ(max) is the maximum output current for the application,
and Iq is the quiescent current the regulator consumes at
IQ(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
RqJA = (150°C – TA) / PD
(eq. 5)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with RqJA’s
less than the calculated value in equation 2 will keep the die
temperature below 150°C. In some cases, none of the packages
will be sufficient to dissipate the heat generated by the IC, and
an external heatsink will be required. The current flow and
voltages are shown in the Measurement Circuit Diagram.
HEATSINKS
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(eq. 6)
where:
RqJC = the junction−to−case thermal resistance,
RqCS = the case−to−heat sink thermal resistance, and
RqSA = the heat sink−to−ambient thermal resistance.
RqJC appears in the package section of the data sheet. Like
RqJA, it too is a function of package type. RqCS and RqSA are
functions of the package type, heatsink and the interface
between them. These values appear in data sheets of
heatsink manufacturers. Thermal, mounting, and
heatsinking considerations are discussed in the
ON Semiconductor application note AN1040/D, available
on the ON Semiconductor website.
www.onsemi.com
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