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PDF NVD4810N Data sheet ( Hoja de datos )
| Número de pieza | NVD4810N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTD4810N, NVD4810N
Power MOSFET
30 V, 54 A, Single N−Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• AEC−Q101 Qualified and PPAP Capable − NVD4810N
• These Devices are Pb−Free and are RoHS Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (RqJA) (Note 1)
Power Dissipation
(RqJA) (Note 1)
Continuous Drain
Current (RqJA) (Note 2)
Power Dissipation
(RqJA) (Note 2)
Continuous Drain
(CNuortreen1t)(RqJC)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
Power Dissipation
(RqJC) (Note 1)
TC = 25°C
Pulsed Drain Current tp=10ms TA = 25°C
Current Limited by Package
TA = 25°C
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
ID
PD
IDM
IDmaxPkg
TJ, Tstg
30
"20
12.4
9.6
2.62
9
7
1.4
54
42
50
120
45
−55 to
175
V
V
A
W
A
W
A
W
A
A
°C
Source Current (Body Diode)
Drain to Source dV/dt
IS
dV/dt
41 A
6.0 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 24 V, VGS = 10 V,
L = 1.0 mH, IL(pk) = 14 A, RG = 25 W)
EAS 98 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
30 V
RDS(on) MAX
10 mW @ 10 V
15.7 mW @ 4.5 V
D
ID MAX
54 A
N−Channel
G
S
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
MARKING DIAGRAM
& PIN ASSIGNMENT
4
Drain
2
1 Drain 3
Gate Source
Y = Year
WW = Work Week
4810N = Device Code
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
October, 2011 − Rev. 10
1
Publication Order Number:
NTD4810N/D
1 page  
NTD4810N, NVD4810N
TYPICAL PERFORMANCE CURVES
2000
1500
VDS = 0 V
Ciss
VGS = 0 V
1000
Crss
TJ = 25°C
Ciss
500
Coss
0 Crss
10 5 0 5 10 15 20 25
VGS
VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
100
VDD = 15 V
ID = 30 A
VGS = 11.5 V
10
1
1
1000
td(off)
tr
td(on)
tf
10
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
100
100 10 ms
10
1
0.1
0.1
100 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 ms
10 ms
dc
1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
12
11 QT
10
9
8
7
6
5
4 Q1
Q2
3
2
1
0
ID = 30 A
0 V < VGS < 11.5 V
TJ = 25°C
0 1 2 3 4 5 6 7 8 9 10111213 141516 171819 202122
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
110
100
90
80
70
60
50
40
30
20
10
0
25
ID = 14 A
50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
175
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
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