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PDF NVD5890N Data sheet ( Hoja de datos )
| Número de pieza | NVD5890N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NVD5890N
Power MOSFET
40 V, 123 A, Single N−Channel DPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• MSL 1/260°C
• AEC Q101 Qualified and PPAP Capable
• 100% Avalanche Tested
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• Motor Drivers
• Pump Drivers for Automotive Braking, Steering and Other High
Current Systems
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent (RqJC)
TC = 25°C
TC = 85°C
Power Dissipation
(RqJC)
Continuous Drain Cur-
rent (RqJA) (Note 1)
Steady
State
TC = 25°C
TA = 25°C
TA = 85°C
Power Dissipation
(RqJA) (Note 1)
TA = 25°C
Pulsed Drain Current tp=10ms TA = 25°C
Current Limited by Package
TA = 25°C
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
IDmaxPkg
TJ, Tstg
40
"20
123
95
107
24
18.5
4.0
400
100
−55 to
175
V
V
A
W
A
W
A
A
°C
Source Current (Body Diode)
Drain to Source dV/dt
IS
dV/dt
100 A
6.0 V/ns
Single Pulse Drain−to−Source Avalanche En-
ergy (VDD = 32 V, VGS = 10 V,
L = 0.3 mH, IL(pk) = 40 A, RG = 25 W)
EAS
240 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
http://onsemi.com
V(BR)DSS
40 V
RDS(on)
3.7 mW @ 10 V
D
ID
123 A
N−Channel
G
S
4
12
3
CASE 369C
DPAK
(Bent Lead)
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
4
Drain
2
1 Drain 3
Gate Source
Y = Year
WW = Work Week
5890N = Device Code
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
January, 2012 − Rev. 1
1
Publication Order Number:
NVD5890N/D
1 page  
NVD5890N
TYPICAL PERFORMANCE CURVES
7000
6000
5000
Ciss
VGS = 0 V
TJ = 25°C
f = 1 MHz
4000
3000
2000
1000
Coss
0 Crss
05
10 15 20 25 30 35
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
40
Figure 7. Capacitance Variation
15 20
14
13
12
QT
11
15
10 VDS
9
VGS
8
7
10
6
5 QGS
QDS
45
3 VDS = 15 V
2 ID = 50 A
1
0
TJ = 25°C
0
0 10 20 30 40 50 60 70 80
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
100
VGS = 10 V
VDD = 20 V
ID = 50 A
td(off)
tf
tr
td(on)
100
10 TJ = 150°C
10
1
100°C
25°C
TJ = −55°C
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
0.1
0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
100 10 ms
10
1
0.1
100 ms
VGS ≤ 20 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 ms
10 ms
dc
1 10 100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
5
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet NVD5890N.PDF ] | |
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