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Número de pieza | NVR5198NLT3G | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NVR5198NL
Power MOSFET
60 V, 155 mW, Single N−Channel Logic
Level, SOT−23
Features
• Small Footprint Industry Standard Surface Mount SOT−23 Package
• Low RDS(on) for Low Conduction Losses and Improved Efficiency
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
Drain−to−Source Voltage
VDSS 60 V
Gate−to−Source Voltage
VGS ±20 V
Continuous Drain
C(Nuortreesnt1R, 2Y,J−3m, abnd 4)
Steady
State
TA = 25°C
TA = 100°C
ID
2.2 A
1.6
Power Dissipation
(RNYoJt−emsb1 and 3)
TA = 25°C
TA = 100°C
PD
1.5 W
0.6
Continuous Drain
Current
(Note 1,
R2q, J3A,
and
4)
Steady
State
TA = 25°C
TA = 100°C
ID
1.7 A
1.2
Power
(Notes
Dissipation
1 and 3)
RqJA
Pulsed Drain Current
TA = 25°C
TA = 100°C
TA = 25°C,
tp = 10 ms
PD
IDM
0.9 W
0.4
27 A
Operating Junction and Storage Temperature
TJ, −55 to °C
Tstg 150
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IS 1.9 A
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS
60 V
RDS(on) TYP
155 mW @ 10 V
205 mW @ 4.5 V
ID MAX
2.2 A
N−Channel
D
G
S
3
1
2
SOT−23
CASE 318
STYLE 21
MARKING DIAGRAM/
PIN ASSIGNMENT
Drain
3
AAL M G
G
1
Gate
2
Source
AAL = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Device
Package
Shipping†
NVR5198NLT1G
SOT−23
(Pb−Free)
3000 /
Tape & Reel
NVR5198NLT3G
SOT−23
(Pb−Free)
10000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
August, 2013 − Rev. 1
1
Publication Order Number:
NVR5198NL/D
1 page 1000
NVR5198NL
TYPICAL CHARACTERISTICS
100
VGS ≤ 10 V
Single Pulse
10 TC = 25°C
10 mS
100 mS
1 1 mS
0.1
0.01
0.1
RDS(on) Limit
Thermal Limit
Package Limit
1
10 mS
dc
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
100 50% Duty Cycle
20%
10%
10 5%
2%
1%
1
0.000001
0.00001
RqJA Steady State = 139°C/W
Single Pulse
0.0001
0.001
0.01
0.1
1
t, TIME (sec)
Figure 14. Thermal Impedance (Junction−to−Ambient)
10
100 1000
http://onsemi.com
5
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