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PDF AP9107 Data sheet ( Hoja de datos )
| Número de pieza | AP9107 | |
| Descripción | Analog Front-end Chip | |
| Fabricantes | BCD | |
| Logotipo |  |
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Preliminary Datasheet
Analog Front-end Chip for Multi-cells Li+ Battery Pack
AP9107
General Description
AP9107 is an analog front-end chip especially for
multi-cells Li-ion/Polymer battery pack application.
It includes 8-Channels analog switch, builds in
passive balancing circuit for 6 channels with 65Ω
discharge resistor, and linear regulator with 5mA
capability which can offer low noise voltage
reference for post ADC circuit.
AP9107 has four logic selection inputs (A/B/C/D).
When all logic pins are set low, no channel is
selected and the chip is turned off with shutdown
mode. The A, B, C and D selection pins are
compatible with TTL/CMOS logic level, can be
connected to MCU I/O port directly to select the right
channel respectively. The VOUT is analog output pin
to indicate exactly the voltage of each channel.
AUX7, AUX8 pins are auxiliary channels, which can
be connected to the NTC and/or PTC resistor to
measure the battery pack temperature.
AP9107 has 4 logic output pins as ALO, BLO, CLO
and DLO, which can transfer control logic for the
upper chip if used in dual or triple chips in serial.
AP9107 is available in standard package of
TSSOP-24 (EDP).
Features
• ±6mV Cell Voltage Matching Error between
eAny 2 CHs after Software Correlation
• Integrated Internal Balancing Circuit with 65Ω
eDischarge Resistor
• Built-in VREF, 5.0V/5.0mA with 1%
• eBuilt-in Logic Transfer with Level Shift for
eApplication with 2 or 3 Chips in Serial
• Ultra Low Current in Shutdown Mode, 4.5μA
• Up to 6-cells in Serial Battery Pack Application
ewith Single Chip
• Up to 11-cells in Serial Battery Pack Application
ewith Dual Chips
• Up to 16-cells in Serial Battery Pack Application
ewith Triple Chips
• Compatible with TTL/CMOS Logic Level
Applications
• E-Bike Battery Pack
• E-Moto Battery Pack
Nov. 2012 Rev 1. 1
TSSOP-24 (EDP)
Figure 1. Package Type of AP9107
BCD Semiconductor Manufacturing Limited
1
1 page  
Preliminary Datasheet
Analog Front-end Chip for Multi-cells Li+ Battery Pack
AP9107
Channel Balance Chart (Note 2)
Note 2:
In balance mode, output voltage (VOUT pin) is forced to 0V, and it does not indicate the channel input voltage.
Balance current between selected channels is active until BAL is set low. Once BAL is set low, VOUT will
indicate selected channel input voltage correctly. Make sure the set up time of channel selection is 1.0ms at least.
Balance current is generated after ‘t’ period, 500μs in typical.
Nov. 2012 Rev 1. 1
BCD Semiconductor Manufacturing Limited
5
5 Page 
Preliminary Datasheet
Analog Front-end Chip for Multi-cells Li+ Battery Pack
AP9107
Truth Table for 6-cells (Single Chip) Battery Application
BAL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Logic Input
ABC
000
000
001
001
010
010
011
011
100
100
101
101
110
110
111
111
000
000
001
001
010
010
011
011
100
100
101
101
110
110
111
111
D
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Balance Status
Close (Shutdown
Mode)
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
Close
N/A
VCELL1
VCELL2
VCELL3
VCELL4
VCELL5
N/A
N/A
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
Output Voltage
0V (Shutdown Mode)
VCELL1
VCELL2
VCELL3
VCELL4
VCELL5
4*(AUX7)
4*(AUX8)
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
VCELL6
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
Nov. 2012 Rev 1. 1
BCD Semiconductor Manufacturing Limited
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet AP9107.PDF ] | |
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