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SZNUP4114 PDF даташит

Спецификация SZNUP4114 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «TVS Diode ( Rectifier )».

Детали детали

Номер произв SZNUP4114
Описание TVS Diode ( Rectifier )
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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SZNUP4114 Даташит, Описание, Даташиты
NUP4114 Series,
SZNUP4114 Series
Transient Voltage
Suppressors
ESD Protection Diodes with Low
Clamping Voltage
The NUP4114 transient voltage suppressors are designed to protect
high speed data lines from ESD. Ultra−low capacitance and high level
of ESD protection make these devices well suited for use in USB 2.0
high speed applications.
Features
Low Clamping Voltage
Small Body Outline Dimensions on SC−88 Package:
0.082x 0.078(2.10 mm x 1.25 mm)
Low Body Height: 0.043(1.10 mm)
Stand−off Voltage: 5.5 V
Low Leakage
Response Time is Typically < 1.0 ns
IEC61000−4−2 Level 4 ESD Protection
These Devices are Pb−Free and are RoHS Compliant
AEC−Q101 Qualified and PPAP Capable − SZNUP4114
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements
Typical Applications
LVDS
USB 2.0 High Speed Data Line and Power Line Protection
Digital Video Interface (DVI) and HDMI
Monitors and Flat Panel Displays
High Speed Communication Line Protection
Notebook Computers
Gigabit Ethernet
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
Operating Junction Temperature Range TJ −40 to +125 °C
Storage Temperature Range
Tstg − 55 to +150 °C
Lead Solder Temperature −
Maximum (10 Seconds)
TL 260 °C
IEC 61000−4−2 (ESD)
Contact
Air
±8 kV
±15
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
http://onsemi.com
5
16
34
2
MARKING
DIAGRAMS
6
SC−88
W1 SUFFIX
1 CASE 419B
X2 MG
G
1
6
SC−88
W1 SUFFIX
1 CASE 419B
X4 MG
G
1
6
TSOP−6
CASE 318G
1 STYLE 12
P4H MG
G
1
6
1
SOT−563
CASE 463A
P4MG
G
1
XXX = Specific Device Code
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 3
1
Publication Order Number:
NUP4114/D









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SZNUP4114 Даташит, Описание, Даташиты
NUP4114 Series, SZNUP4114 Series
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
Parameter
I
IF
IPP Maximum Reverse Peak Pulse Current
VC Clamping Voltage @ IPP
VRWM Working Peak Reverse Voltage
IR Maximum Reverse Leakage Current @ VRWM
VBR Breakdown Voltage @ IT
IT Test Current
IF Forward Current
VF Forward Voltage @ IF
Ppk Peak Power Dissipation
C Capacitance @ VR = 0 and f = 1.0 MHz
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
VC VBR VRWM
IIRT VF
V
IPP
Uni−Directional TVS
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Conditions
Min Typ Max Unit
Reverse Working Voltage
VRWM (Note 1)
5.5 V
Breakdown Voltage
VBR IT = 1 mA, (Note 2)
5.5 V
Reverse Leakage Current
IR VRWM = 5.5 V
1.0 mA
Clamping Voltage
VC IPP = 5 A (Note 3)
9.0 V
Clamping Voltage
VC IPP = 8 A (Note 3)
10 V
Clamping Voltage
VC IPP = 1 A (Note 4)
8.3 10 V
ESD Clamping Voltage
VC Per IEC61000−4−2 (Note 5)
See Figures 1 & 2
Maximum Peak Pulse Current
IPP 8x20 ms Waveform (Note 3)
12 A
Junction Capacitance
CJ VR = 0 V, f = 1 MHz between I/O Pins and GND
0.6 pF
Junction Capacitance
CJ VR = 0 V, f = 1 MHz between I/O Pins
0.3 pF
1. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC
or continuous peak operating voltage level.
2. VBR is measured at pulse test current IT.
3. Nonrepetitive current pulse (Pin 5 to Pin 2)
4. Nonrepetitive current pulse (I/O to GND).
5. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
6. Include SZ−prefix devices where applicable.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
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SZNUP4114 Даташит, Описание, Даташиты
NUP4114 Series, SZNUP4114 Series
IEC 61000−4−2 Spec.
Level
First Peak
Test Volt- Current Current at
age (kV)
(A) 30 ns (A)
1 2 7.5 4
2 4 15 8
3 6 22.5 12
48
30 16
Current at
60 ns (A)
2
4
6
8
IEC61000−4−2 Waveform
Ipeak
100%
90%
I @ 30 ns
I @ 60 ns
10%
Figure 3. IEC61000−4−2 Spec
tP = 0.7 ns to 1 ns
ESD Gun
TVS
Oscilloscope
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
100
tr
90
80
70
60
50
40
30
20
10
0
0
PEAK VALUE IRSM @ 8 ms
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE IRSM/2 @ 20 ms
tP
20 40
60
t, TIME (ms)
Figure 5. 8 X 20 ms Pulse Waveform
80
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