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CD4011BC PDF даташит

Спецификация CD4011BC изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Quad 2-Input NAND Buffered B Series Gate».

Детали детали

Номер произв CD4011BC
Описание Quad 2-Input NAND Buffered B Series Gate
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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CD4011BC Даташит, Описание, Даташиты
October 1987
Revised March 2002
CD4001BC/CD4011BC
Quad 2-Input NOR Buffered B Series Gate
Quad 2-Input NAND Buffered B Series Gate
General Description
The CD4001BC and CD4011BC quad gates are monolithic
complementary MOS (CMOS) integrated circuits con-
structed with N- and P-channel enhancement mode tran-
sistors. They have equal source and sink current
capabilities and conform to standard B series output drive.
The devices also have buffered outputs which improve
transfer characteristics by providing very high gain.
All inputs are protected against static discharge with diodes
to VDD and VSS.
Features
s Low power TTL:
Fan out of 2 driving 74L compatibility: or 1 driving 74LS
s 5V–10V–15V parametric ratings
s Symmetrical output characteristics
s Maximum input leakage 1 µA at 15V over full
temperature range
Ordering Code:
Order Number Package Number
Package Description
CD4001BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4001BCSJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
CD4001BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
CD4011BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
CD4011BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.
Connection Diagrams
Pin Assignments for DIP, SOIC and SOP
CD4001BC
Pin Assignments for DIP and SOIC
CD4011BC
Top View
© 2002 Fairchild Semiconductor Corporation DS005939
Top View
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CD4011BC Даташит, Описание, Даташиты
Schematic Diagrams
CD4001BC
1/4 of device shown
J=A+B
Logical 1= HIGH
Logical 0= LOW
All inputs protected by standard
CMOS protection circuit.
CD4011BC
1/4 of device shown
J=AB
Logical 1= HIGH
Logical 0= LOW
All inputs protected by standard
CMOS protection circuit.
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CD4011BC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
(Note 2)
Voltage at any Pin
Power Dissipation (PD)
Dual-In-Line
Small Outline
VDD Range
Storage Temperature (TS)
Lead Temperature (TL)
(Soldering, 10 seconds)
0.5V to VDD +0.5V
700 mW
500 mW
0.5 VDC to +18 VDC
65°C to +150°C
260°C
Recommended Operating
Conditions
Operating Range (VDD)
Operating Temperature Range
3 VDC to 15 VDC
CD4001BC, CD4011BC
55°C to +125°C
Note 1: Absolute Maximum Ratingsare those values beyond which the
safety of the device cannot be guaranteed. Except for Operating Tempera-
ture Rangethey are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics tables provide conditions
for actual device operation.
Note 2: All voltages measured with respect to VSS unless otherwise speci-
fied.
DC Electrical Characteristics (Note 2)
Symbol
Parameter
Conditions
IDD Quiescent Device VDD = 5V, VIN = VDD or VSS
Current
VDD = 10V, VIN = VDD or VSS
VDD = 15V, VIN = VDD or VSS
VOL LOW Level
VDD = 5V
Output Voltage
VDD = 10V |IO| < 1 µA
VDD = 15V
VOH HIGH Level
VDD = 5V
Output Voltage
VDD = 10V |IO| < 1 µA
VDD = 15V
VIL LOW Level
VDD = 5V, VO = 4.5V
Input Voltage
VDD = 10V, VO = 9.0V
VDD = 15V, VO = 13.5V
VIH HIGH Level
VDD = 5V, VO = 0.5V
Input Voltage
VDD = 10V, VO = 1.0V
VDD = 15V, VO = 1.5V
IOL LOW Level Output VDD = 5V, VO = 0.4V
Current
VDD = 10V, VO = 0.5V
(Note 3)
VDD = 15V, VO = 1.5V
IOH HIGH Level Output VDD = 5V, VO = 4.6V
Current
VDD = 10V, VO = 9.5V
(Note 3)
VDD = 15V, VO = 13.5V
IIN Input Current
VDD = 15V, VIN = 0V
VDD = 15V, VIN = 15V
Note 3: IOL and IOH are tested one output at a time.
55°C
Min Max
0.25
0.5
1.0
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
0.64
1.6
4.2
0.64
1.6
4.2
0.10
0.1
Min
4.95
9.95
14.95
3.5
7.0
11.0
0.51
1.3
3.4
0.51
1.3
3.4
+25°C
Typ
0.004
0.005
0.006
0
0
0
5
10
15
2
4
6
3
6
9
0.88
2.25
8.8
0.88
2.25
8.8
105
105
Max
0.25
0.50
1.0
0.05
0.05
0.05
1.5
3.0
4.0
0.10
0.10
+125°C
Min Max
7.5
15
30
0.05
0.05
0.05
4.95
9.95
14.95
1.5
3.0
4.0
3.5
7.0
11.0
0.36
0.9
2.4
0.36
0.9
2.4
1.0
1.0
Units
µA
V
V
V
V
mA
mA
µA
AC Electrical Characteristics (Note 4)
CD4001BC: TA = 25°C, Input tr; tf = 20 ns. CL = 50 pF, RL = 200k. Typical temperature coefficient is 0.3%/°C.
Symbol
Parameter
Conditions
Typ
tPHL Propagation Delay Time,
VDD = 5V
HIGH-to-LOW Level
VDD = 10V
VDD = 15V
tPLH Propagation Delay Time,
VDD = 5V
LOW-to-HIGH Level
VDD = 10V
VDD = 15V
tTHL, tTLH Transition Time
VDD = 5V
VDD = 10V
VDD = 15V
CIN Average Input Capacitance
Any Input
CPD Power Dissipation Capacity
Any Gate
Note 4: AC Parameters are guaranteed by DC correlated testing.
120
50
35
110
50
35
90
50
40
5
14
Max
250
100
70
250
100
70
200
100
80
7.5
Units
ns
ns
ns
pF
pF
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