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ADuM141E Datasheet Download - Analog Devices

Номер произв ADuM141E
Описание 3.0 kV RMS/3.75 kV RMS Quad Digital Isolators
Производители Analog Devices
логотип Analog Devices логотип 

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ADuM141E Даташит, Описание, Даташиты
Data Sheet
3.0 kV RMS/3.75 kV RMS
Quad Digital Isolators
ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E
FEATURES
High common-mode transient immunity: 100 kV/μs
High robustness to radiated and conducted noise
Low propagation delay
13 ns maximum for 5 V operation
15 ns maximum for 1.8 V operation
150 Mbps maximum guaranteed data rate
Safety and regulatory approvals (pending)
UL recognition
3000 V rms/3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 849 V peak
CQC certification per GB4943.1-2011
Backward compatibility
ADuM140E1/ADuM141E1/ADuM142E1 pin-compatible
with ADuM1400/ADuM1401/ADuM1402
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
Fail-safe high or low options
16-lead, RoHS compliant, SOIC package
APPLICATIONS
General-purpose multichannel isolation
Serial peripheral interface (SPI)/data converter isolation
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM140D/ADuM140E/ADuM141D/ADuM141E/
ADuM142D/ADuM142E1 are quad-channel digital isolators
based on Analog Devices, Inc., iCoupler® technology. Combining
high speed, complementary metal-oxide semiconductor (CMOS)
and monolithic air core transformer technology, these isolation
components provide outstanding performance characteristics
superior to alternatives such as optocoupler devices and other
integrated couplers. The maximum propagation delay is 13 ns
with a pulse width distortion of less than 3 ns at 5 V operation.
Channel matching is tight at 3.0 ns maximum.
The ADuM140D/ADuM140E/ADuM141D/ADuM141E/
ADuM142D/ADuM142E data channels are independent and
are available in a variety of configurations with a withstand
voltage rating of 3.0 kV rms or 3.75 kV rms (see the Ordering
Guide). The devices operate with the supply voltage on either side
ranging from 1.8 V to 5 V, providing compatibility with lower
voltage systems as well as enabling voltage translation functionality
across the isolation barrier.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAMS
VDD1 1 ADuM140D/ADuM140E 16 VDD2
GND1 2
VIA 3
ENCODE
DECODE
15 GND2
14 VOA
VIB 4
ENCODE
DECODE
13 VOB
VIC 5
ENCODE
DECODE
12 VOC
VID 6
ENCODE
DECODE
11 VOD
DISABLE1/NIC 7
GND1 8
10 NIC/VE2
9 GND2
NOTES
1. NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
2. PIN 7 IS DISABLE1 AND PIN 10 IS NIC FOR THE ADuM140D, AND
PIN 7 IS NIC AND PIN 10 IS VE2 FOR THE ADuM140E.
Figure 1. ADuM140D/ADuM140E Functional Block Diagram
VDD1 1 ADuM141D/ADuM141E 16 VDD2
GND1 2
VIA 3
ENCODE
DECODE
15 GND2
14 VOA
VIB 4
ENCODE
DECODE
13 VOB
VIC 5
ENCODE
DECODE
12 VOC
VOD 6
DECODE
ENCODE
11 VID
DISABLE1/VE1 7
GND1 8
10 DISABLE2/VE2
9 GND2
NOTES
1. PIN 7 IS DISABLE1 AND PIN 10 IS DISABLE2 FOR THE ADuM141D,
AND PIN 7 IS VE1 AND PIN 10 IS VE2 FOR THE ADuM141E.
Figure 2. ADuM141D/ADuM141E Functional Block Diagram
VDD1 1 ADuM142D/ADuM142E 16 VDD2
GND1 2
VIA 3
ENCODE
DECODE
15 GND2
14 VOA
VIB 4
ENCODE
DECODE
13 VOB
VOC 5
DECODE
ENCODE
12 VIC
VOD 6
DECODE
ENCODE
11 VID
DISABLE1/VE1 7
GND1 8
10 DISABLE2/VE2
9 GND2
NOTES
1. PIN 7 IS DISABLE1 AND PIN 10 IS DISABLE2 FOR THE ADuM142D,
AND PIN 7 IS VE1 AND PIN 10 IS VE2 FOR THE ADuM142E.
Figure 3. ADuM142D/ADuM142E Functional Block Diagram
Unlike other optocoupler alternatives, dc correctness is ensured
in the absence of input logic transitions. Two different fail-safe
options are available, by which the outputs transition to a pre-
determined state when the input power supply is not applied or the
inputs are disabled. The ADuM140E1/ADuM141E1/ADuM142E1
are pin-compatible with the ADuM1400/ADuM1401/ADuM1402.
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329.
Other patents are pending.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com







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ADuM141E Даташит, Описание, Даташиты
ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation ............................... 3
Electrical Characteristics—3.3 V Operation ............................ 5
Electrical Characteristics—2.5 V Operation ............................ 7
Electrical Characteristics—1.8 V Operation ............................ 9
Insulation and Safety Related Specifications .......................... 11
Package Characteristics ............................................................. 11
Regulatory Information............................................................. 12
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ............................................................................ 13
REVISION HISTORY
11/15—Rev. A to Rev. B
Added 16-Lead, Narrow Body SOIC Package ................Universal
Changes to Title, Features Section, and General Description
Section................................................................................................ 1
Changes to Table 1............................................................................ 3
Changes to Table 3............................................................................ 5
Changes to Table 5............................................................................ 7
Changes to Table 7............................................................................ 9
Added Table 9; Renumbered Sequentially .................................. 11
Changes to Table 10 and Table 11 ................................................ 11
Changes to Regulator Information Section................................. 12
Changes to Table 12........................................................................ 12
Added Table 13 ............................................................................... 12
Changes to Table 14........................................................................ 13
Added Table 15 and Figure 4; Renumbered Sequentially ......... 14
Changes to Figure 5 Caption......................................................... 14
Changes to Endnote 3, Table 17, and Table 19 Title .................. 15
Added Table 18 ............................................................................... 15
Changes to Surface Tracking Section........................................... 23
Changes to Calculation and Use of Parameters Example
Section.............................................................................................. 24
Updated Outline Dimensions ....................................................... 25
Changes to Ordering Guide .......................................................... 26
Recommended Operating Conditions .................................... 14
Absolute Maximum Ratings ......................................................... 15
ESD Caution................................................................................ 15
Truth Tables ................................................................................ 16
Pin Configurations and Function Descriptions ......................... 17
Typical Performance Characteristics ........................................... 20
Applications Information .............................................................. 22
Overview ..................................................................................... 22
Printed Circuit Board (PCB) Layout ....................................... 22
Propagation Delay Related Parameters ................................... 23
Jitter Measurement..................................................................... 23
Insulation Lifetime ..................................................................... 23
Outline Dimensions ....................................................................... 25
Ordering Guide .......................................................................... 26
9/15—Rev. 0 to Rev. A
Added ADuM141D/ADuM141E .....................................Universal
Added ADuM142D/ADuM142E .....................................Universal
Changes to Features and Figure 1 ...................................................1
Delete Figure 2; Renumbered Sequentially....................................1
Added Figure 2 and Figure 3; Renumbered Sequentially ............1
Changes to Table 1.............................................................................3
Changes to Table 2.............................................................................4
Changes to Table 3.............................................................................5
Changes to Table 4.............................................................................6
Changes to Table 5.............................................................................7
Change to Table 6 ..............................................................................8
Changes to Table 7.............................................................................9
Changes to Table 8.......................................................................... 10
Changes to Table 11 ....................................................................... 11
Changes to Table 12 ....................................................................... 12
Changes Table 15 ............................................................................ 13
Changes to Table 17 ....................................................................... 14
Added Figure 7, Figure 8, and Table 19; Renumbered
Sequentially ..................................................................................... 16
Added Figure 9, Figure 10, and Table 20..................................... 16
Added Figure 13 and Figure 16 .................................................... 18
Changes to Figure 17 and Figure 18 ............................................ 19
Changes to Overview Section and Figure 19.............................. 20
Updated Outline Dimensions....................................................... 23
Changes to Ordering Guide .......................................................... 23
4/15—Revision 0: Initial Version
Rev. B | Page 2 of 27







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ADuM141E Даташит, Описание, Даташиты
Data Sheet ADuM140D/ADuM140E/ADuM141D/ADuM141E/ADuM142D/ADuM142E
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate1
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold Voltage
Logic High
Logic Low
Output Voltage
Logic High
Logic Low
Input Current per Channel
VE2 Enable Input Pull-Up Current
DISABLE1 Input Pull-Down Current
Tristate Output Current per Channel
Quiescent Supply Current
ADuM140D/ADuM140E
ADuM141D/ADuM141E
ADuM142D/ADuM142E
Dynamic Supply Current
Dynamic Input
Dynamic Output
Symbol Min
PW
tPHL, tPLH
PWD
6.6
150
4.8
tPSK
tPSKCD
tPSKOD
Typ Max
7.2 13
0.5 3
1.5
6.1
0.5 3.0
0.5 3.0
490
70
VIH 0.7 × VDDx
VIL
0.3 × VDDx
VOH VDDx − 0.1 VDDx
VDDx − 0.4 VDDx
0.2
VOL 0.0 0.1
0.2 0.4
II −10 +0.01 +10
IPU −10 −3
IPD 9 15
IOZ −10 +0.01 +10
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDD1 (Q)
IDD2 (Q)
IDDI (D)
IDDO (D)
1.2 2.2
2.0 2.72
12.0 20.0
2.0 2.92
1.6 2.46
1.9 2.62
10.0 17.0
6.0 10.0
1.6 2.46
1.6 2.46
7.2 11.5
8.4 11.5
0.01
0.02
Rev. B | Page 3 of 27
Unit
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ps p-p
ps rms
Test Conditions/Comments
Within pulse width distortion (PWD) limit
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
Between any two units at the
same temperature, voltage, and load
See the Jitter Measurement section
See the Jitter Measurement section
V
V
V IOx2 = −20 μA, VIx = VIxH3
V IOx2 = −4 mA, VIx = VIxH3
V IOx2 = 20 μA, VIx = VIxL4
V IOx2 = 4 mA, VIx = VIxL4
μA 0 V ≤ VIx ≤ VDDx
μA VE2 = 0 V
μA DISABLE1 = VDDx
μA 0 V ≤ VOx ≤ VDDx
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 0 (E0, D0), 1 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA VI5 = 1 (E0, D0), 0 (E1, D1)6
mA/Mbps Inputs switching, 50% duty cycle
mA/Mbps Inputs switching, 50% duty cycle










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