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PDF HFBR-2525EZ Data sheet ( Hoja de datos )

Número de pieza HFBR-2525EZ
Descripción 12 Megabaud Versatile Link Fiber Optic Receiver
Fabricantes Avago 
Logotipo Avago Logotipo



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HFBR-1525EZ Transmitter
HFBR-2525EZ Receiver
12 Megabaud Versatile Link Fiber Optic Transmitter
and Receiver for 1 mm POF and 200 μm HCS®
Data Sheet
Description
The HFBR-1525EZ transmitter is an LED in a low cost
plastic housing designed to efficiently couple power
into 200 μm diameter Hard Clad Silica (HCS) and 1 mm
diameter Plastic optical fiber (POF). The HFBR-2525EZ re-
ceiver incorporates a PIN detector and digital output IC
compatible with CMOS and TTL logic families.
HFBR-1525EZ/HFBR-2525EZ links operate from DC to 12
MBd at distances up to 50 meters with 1 mm POF and up
to 500 meters with 200 μm HCS. No minimum link dis-
tances are required when using recommended circuits,
simplifying design.
Versatile Link components can be interlocked (N-plexed
together) to minimize space and to provide dual connec-
tions with the duplex connectors. Up to eight packages
can be interlocked and inserted into a printed circuit
board.
POF and HCSare available in pre-connectored lengths
or can be easily field-terminated. A single transmitter
drive current for POF and HCSallows both fibers to be
used with a single design.
Features
RoHS-compliant
Data transmission at signal rates of dc to 12 MBd
Up to 50 meters distances with 1 mm Plastic Optical
Fiber (POF)
Up to 500 meters distances with 200 μm Hard Clad
Silica (HCS)
Wide dynamic range receiver allows operation from
zero to maximum link distance with a single transmit-
ter drive current
Link distances specified for variations in temperature,
power supply, and fiber attenuation
DC coupled receiver with CMOS/TTL output for easy
designs: No data encoding or digitizing circuitry re-
quired
Pulse width distortion (PWD) controlled to limit dis-
tortion from low duty cycle or burst mode data
High noise immunity
Compatible with Avago’s versatile link family of con-
nectors, for easy termination of fiber
Applications
Industrial control and factory automation
Serial field buses
Intra-system links; board-to-board, rack-to-rack
Extension of RS-232, RS-485
Elimination of ground loops
High voltage isolation
Reduces voltage transient susceptibility
HCSis a registered trademark of OFS.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of
these components to prevent damage and/or degradation which may be induced by ESD.

1 page




HFBR-2525EZ pdf
HFBR-2525EZ Receiver
The HFBR-2525EZ receiver consists of a silicon PIN photodiode and digitiz-
ing IC to produce a logic compatible output. The IC includes a unique circuit
to correct the pulse width distortion (PWD) of the first bit after a long idle
period. This enables operation from DC to 12 MBd with low PWD for arbitrary
data patterns.
The receiver output is a “push-pull” stage compatible with TTL and CMOS
logic. The receiver housing is a dark, conductive plastic, compatible with all
Versatile Link connectors.
GROUND 5
GROUND 8
4 NO CONNECT
3 VCC
IC 2 GROUND
1 VO
SEE NOTES 5,7
HFBR-2525EZ Receiver, top view
Electrical
and
Optical
Characteristics:
T
A
=
-40°
to
+85°C,
4.75
V
<
V
CC
<
5.25
V,
unless
otherwise
noted.
Parameter
Symbol Min. Typ.[1] Max. Unit
T (°C)
A
Condition
Peak POF Sensitivity:
Minimum Input for
P
RL,min
-23.0 -21.0 dBm
-20.0
+25 1 mm POF,
0 to +70 |PWD| < 30 ns
Logic “0”
-19.5
-40 to +85
Peak POF Overdrive
Limit:Maximum
Input for Logic “0”
P
RL,max
+1.0
+0.0
-1.0
+5.0
dBm +25 1 mm POF,
0 to +70 |PWD| < 30 ns
-40 to +85
Peak POF Off State
Limit: Maximum
Input for Logic “1”
PRH,max
-42 dBm
1 mm POF
Peak HCS
Sensitivity: Minimum
Input for Logic “0”
PRL,min
-25.0 -23.0
-22.0
-21.5
dBm
+25
0 to +70
-40 to +85
200 μm HCS,
|PWD| < 30 ns
Peak HCS Overdrive
Limit: Maximum
Input for Logic “0”
PRL,max
-1.0
-2.0
+3.0
-3.0
dBm
+25
0 to +70
-40 to +85
200 μm HCS,
|PWD| < 30 ns
Peak HCS Off State
Limit: Maximum
Input for Logic “1”
PRH,max
-44 dBm
200 μm HCS
Supply Current
High Level Output
Voltage
ICC 19 45 mA
V 4.2 4.7
OH
V
VO = Open
I = -40 μA
O
Low Level Output
Voltage
VOL
0.22 0.4
V
IO = +1.6 mA
Output Rise Time
Output Fall Time
Thermal Resistance,
Junction to Case
t
r
tf
jc
12 30
ns
10 30
ns
200 °C/W
C = 10 pF
L
CL = 10 pF
Electric Field
Immunity
EMAX 8 V/m
Near Field,
Electrical
Field Source
Power Supply
Noise Immunity
PSNI 0.1 0.4
V
pp
Sine Wave
DC - 10 MHz
Note Fig.
2,6 8,10
2,3, 7,8,
69
2,6,
8
2,6
2,3,
6
2,6,
8
6
6
4
5
6
Notes:
1. Typical data are at +25°C, V = 5.0 V.
CC
2. Input power levels are for peak (not average) optical input levels. For 50% duty cycle data, peak optical power is twice the average optical
power.
3. Receiver overdrive (P ) is specified as the limit where |PWD| will not exceed 30 ns. The receiver will be in the correct state (logic“0”) for opti-
RL,max
cal powers above P . However, it may not meet a 30% symbol period PWD if the overdrive limit is exceeded. Refer to Figure 8 for PWD per-
RL,max
formance at high received optical powers.
4. Typical value measured from junction to PC board solder joint for horizontal mount package, HFBR-2525EZ.
5. Pins 5 and 8 are electrically connected to the conductive housing and are also used for mounting and retaining purposes. It is required that
pins 5 and 8 be connected to ground to maintain conductive housing shield effectiveness.
6. In recommended receiver circuit, with an optical signal from the recommended transmitter circuit.
7. Pin 4 is electrically isolated internally. Pin 4 may be externally connected to pin 1 for board layout compatibility with HFBR-25X1Z, HFBR-25X2Z
and HFBR-25X4Z. Otherwise it is recommended pin 4 be grounded as in Figure 11.
8. BER ≤ 10E-9, includes a 10.8 dB margin below the receiver switching threshold level (signal to noise ratio = 12).
5

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