74HCT125 PDF даташит
Спецификация 74HCT125 изготовлена «NXP Semiconductors» и имеет функцию, называемую «Quad buffer/line driver». |
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Детали детали
Номер произв | 74HCT125 |
Описание | Quad buffer/line driver |
Производители | NXP Semiconductors |
логотип |
16 Pages
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74HC125; 74HCT125
Quad buffer/line driver; 3-state
Rev. 6 — 1 December 2015
Product data sheet
1. General description
The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by
the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high
impedance OFF-state. Inputs include clamp diodes. This enables the use of current
limiting resistors to interface inputs to voltages in excess of VCC.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
The 74HC125: CMOS levels
The 74HCT125: TTL levels
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
74HC125D
40 C to +125 C SO14
74HCT125D
74HC125DB
40 C to +125 C SSOP14
74HCT125DB
74HC125PW 40 C to +125 C TSSOP14
74HCT125PW
Description
plastic small outline package; 14 leads; body width
3.9 mm
Version
SOT108-1
plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
plastic thin shrink small outline package; 14 leads; body SOT402-1
width 4.4 mm
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NXP Semiconductors
4. Functional diagram
74HC125; 74HCT125
Quad buffer/line driver; 3-state
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Fig 1. Logic symbol
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Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
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Fig 3. Logic diagram (one buffer)
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Fig 4. Pin configuration SO14 and (T)SSOP14
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74HC_HCT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 16
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NXP Semiconductors
74HC125; 74HCT125
Quad buffer/line driver; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
1OE, 2OE, 3OE, 4OE
1A, 2A, 3A, 4A
1Y, 2Y, 3Y, 4Y
GND
VCC
Pin
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
14
6. Functional description
Description
output enable input (active LOW)
data input
data output
ground (0 V)
supply voltage
Table 3.
Control
nOE
L
Function table[1]
H
Input
nA
L
H
X
Output
nY
L
H
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max Unit
VCC
IIK
IOK
IO
ICC
IGND
Tstg
Ptot
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to (VCC + 0.5 V)
SO14 and (T)SSOP14 packages
0.5
[1] -
[1] -
-
-
-
65
[2] -
+7
20
20
35
+70
70
+150
500
V
mA
mA
mA
mA
mA
C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO14 package: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
74HC_HCT125
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 1 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 16
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