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PDF NTMFS4825NFE Data sheet ( Hoja de datos )
| Número de pieza | NTMFS4825NFE | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NTMFS4825NFE
Power MOSFET
30 V, 171 A, Single N−Channel, SO−8 FL
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Includes Schottky Diode
• Optimized Gate Charge to Minimize Switching Losses
• Dual Sided Cooling Capability
• These are Pb−Free Device
Applications
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
C(Nuortreen1t)RqJA
VDSS 30 V
VGS ±20 V
TA = 25°C
ID
29 A
TA = 85°C
21
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current
10 sec
RqJA
v
TA = 25°C
TA = 25°C
TA = 85°C
PD
ID
2.74 W
47 A
34
Power Dissipation
RqJA, t v 10 sec
Continuous Drain
C(Nuortreen2t)RqJA
Steady
State
TA = 25°C
TA = 25°C
TA = 85°C
PD
ID
7.3 W
17 A
12
Power Dissipation
RqJA (Note 2)
Continuous Drain
C(Nuortreen1t)RqJC
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
0.95 W
171 A
123
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
TC = 25°C
tp=10ms TA = 25°C
PD
IDM
96.2 W
288 A
Current limited by package
TA = 25°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 50 Apk, L = 0.3 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IDmaxpkg
TJ,
TSTG
IS
dV/dt
EAS
TL
100
−40 to
+150
120
6
375
260
A
°C
A
V/ns
mJ
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2012
May, 2012 − Rev. 1
1
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
2.0 mW @ 10 V
3.0 mW @ 4.5 V
ID MAX
171 A
140 A
N−CHANNEL MOSFET
D
G
S
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
S
S
825NFE
AYWZZ
D
GD
D
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
ORDERING INFORMATION
Device
NTMFS4825NFET1G
Package
SO−8FL
(Pb−Free)
Shipping†
1500 /
Tape & Reel
NTMFS4825NFET3G SO−8FL
5000 /
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NTMFS4825NFE/D
1 page  
NTMFS4825NFE
TYPICAL PERFORMANCE CURVES
8000
7000
6000
5000
4000
3000
2000
1000 Crss
0
04
VGS = 0 V TJ = 25°C
Ciss
Coss
8 12 16 20 24 28
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
11
10
9
8
7
6
5
4 Qgs
3
2
1
0
0 10
QT
Qgd
ID = 30 A
TJ = 25°C
VDD = 15 V
20 30 40 50 60 70
QG, TOTAL GATE CHARGE (nC)
80
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Charge
1000
100
VDD = 15 V
ID = 15 A
VGS = 10 V
10
td(off)
tf
tr
td(on)
30
VGS = 0 V
25 TJ = 25°C
20
15
10
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
100
VGS = 20 V
Single Pulse
TC = 25°C
10
1
10 ms
100 ms
1 ms
10 ms
0.1
0.01
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
dc
1 10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
5
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
0.8
Figure 10. Diode Forward Voltage vs. Current
400
ID = 50 A
350
300
250
200
150
100
50
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
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