NOP04811 PDF даташит
Спецификация NOP04811 изготовлена «ON Semiconductor» и имеет функцию, называемую «400/300/200/100 DPI High-Speed Photodiode Array». |
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Детали детали
Номер произв | NOP04811 |
Описание | 400/300/200/100 DPI High-Speed Photodiode Array |
Производители | ON Semiconductor |
логотип |
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NOP04811
400/300/200/100 DPI
High-Speed Photodiode
Array
Description
The NOP04811 photodiode array (PDA) provides selectable 400,
300, 200 and 100 dot per inch (dpi) resolution. The sensor contains an
on−chip output amplifier, internal power−down capability and parallel
transfer features that are uniquely combined with advanced
active−pixel−sensor technology. Applications for the photodiode
sensor array include currency verification, bar code scanning and
industrial process automation equipment.
Features
• 400, 300, 200 and 100 dpi Selectable Resolutions
• 232, 174, 116 or 58 Image Sensor Elements (pixels)
• 63.45 mm (400 dpi) Pixel Center−to−Center Spacing
• On−chip Amplifier
• Single 3.3 V Power Supply
• 3.3 V Input Clocks and Control Signals
• 8.0 MHz Maximum Pixel Rate
• Parallel Integration and Transfer Operations
• Automatic Power−down of Internal Circuitry
• High Sensitivity
• Low Power
• Low Noise
• This is a Pb−Free Device
Applications
• Currency Verification
• Document Scanning
• Barcode Scanning
• Process Automation Equipment
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OLCC12
CL SUFFIX
CASE 755AA
MARKING DIAGRAM
XXXXXXXX AYW
(Bottom View of Package)
XXXXXXXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Micro
Controller
GPIO
100 W
100 W
100 W
100 W
RS1
RS2
GBST
CLK
SI
NOP04811
Photodiode Array Storage, Transfer and Readout Registers
VDD
0.1 mF
+
10 mF
Amp
V OUT
VREF
SO
VSS
50 kW
100 W
0.1 mF
Figure 1. Typical Application Circuit
© Semiconductor Components Industries, LLC, 2012
March, 2012 − Rev. 1
1
Publication Order Number:
NOP04811/D
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NOP04811
VOUT 1
12 TEST (NC)
VSS 2
11 SI
VREF
RS1
3 10 GBST
(Top View)
49
CLK
RS2 5
8 VDD
SO 6
7 NC
Figure 2. Pinout Configuration
Table 1. PIN FUNCTION DESCRIPTION
Pin Pin Name
Description
1
VOUT
Analog video output signal
2
VSS
Ground
3
VREF
Input reference voltage for the differential amplifier driving VOUT, sets the output reset (dark) voltage level
4 RS1 Selects the 400, 300, 200 or 100 dpi resolution mode
5
RS2 (NC)
Has no functionality, this pad should be left unconnected
6 SO End−of−scan output pulse used to drive the start pulse (SI) input of the next sensor chip in a module
7 NC No connect, this pad should be left unconnected
8
VDD
+3.3 V power supply
9 CLK Clock input for the shift register
10
GBST
Global start pulse initializes the start inputs of all sensor chips in a module and starts the scanning process
of the first sensor chip
11 SI Start pulse, input to start a line scan
12 TEST (NC) Test pad used during wafer sort, this pad should be left unconnected
12
3 Scan Direction Left to Right
Row of 232 Pixels (400dpi)
and Video Line Multiplexers
Parallel Transfer, Storage Cells, Readout Registers
229 230 231 232
TEST
(NC)
Amplifier, Power Down,
Offset Control
SI
GBST
CLK
VDD
VOUT
VSS
VREF
RS1
RS2
(NC)
SO
Figure 3. Simplified Block Diagram
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NOP04811
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Unit
Power supply voltage
VDD 4 V
Input voltage range for CLK, SI, GBST, RS1, VREF
Vin
VSS−0.5 to VDD+0.5
V
Storage Temperature
TSTG
−25 to 75
°C
Storage Humidity, Non−Condensing
HSTG
10 to 90
%
ESD Capability, Human Body Model (Note 1)
ESDHBM
2500
V
ESD Capability, Machine Model (Note 1)
ESDMM
250
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating: ≤ 100 mA per JEDEC standard: JESD78
Table 3. RECOMMENDED OPERATING RANGES (Unless otherwise specified, these specifications apply TA = 25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Power supply voltage
Power supply current, initialization – first 100 clock cycles
Power supply current, integration and transfer mode
Power supply current, idle mode, still integrating
Low level input voltage for CLK, SI, GBST, RS1
High level input voltage for CLK, SI, GBST, RS1
Reference voltage
Clock frequency
VDD
3.1
3.3
3.5 V
IDD_INIT
5.8
mA
IDD_OPER
40
mA
IDD_IDLE
3.2
mA
VIL VSS – 0.5
0.6 V
VIH 2.8
VDD + 0.1
V
VREF
1.1
1.2
1.3 V
f 0.5 8.0 8.0 MHz
Pixel rate (Note 2)
PR 0.5 8.0 8.0 MHz
Integration time (line scan rate) (Note 3)
Tint
99.5 ms
Resistive load on VOUT
RL 50 50
kW
Capacitive load on VOUT
CL 150 pF
Operating Temperature
Top −10
50 °C
Operating Humidity, Non−Condensing
Hop 10
85 %
2. One pixel is clocked out for every clock cycle.
3. Tint is the integration time of a single sensor and is the time between two start pulses. The minimum integration time is the time it takes to
clock out 100 inactive pixels and 232 active pixels for the 400 dpi mode, 100 inactive pixels and 174 active pixels for the 300 dpi mode, 100
inactive pixels and 116 active pixels for the 200 dpi mode or 100 inactive pixels and 58 active pixels for the 100 dpi mode, at a given frequency.
Table 4. PHYSICAL SPECIFICATIONS
Parameter
Number of pixels, 400 dpi
Number of pixels, 300 dpi
Number of pixels, 200 dpi
Number of pixels, 100 dpi
Pixel−to−pixel spacing, 400 dpi
Pixel−to−pixel spacing, 300 dpi
Pixel−to−pixel spacing, 200 dpi
Pixel−to−pixel spacing, 100 dpi
Symbol
Pn_400
Pn_300
Pn_200
Pn_100
Dpp_400
Dpp_300
Dpp_200
Dpp_100
Typ
232
174
116
58
63.45
84.60
126.90
253.80
Unit
mm
mm
mm
mm
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