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PDF NVMFD5853NWF Data sheet ( Hoja de datos )
| Número de pieza | NVMFD5853NWF | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | ON Semiconductor | |
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NVMFD5853N,
NVMFD5853NWF
Power MOSFET
40 V, 10 mW, 53 A, Dual N−Channel, Dual
SO−8FL
Features
• Small Footprint (5x6 mm) for Compact Designs
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• NVMFD5853NWF − Wettable Flanks Product
• AEC−Q101 Qualified and PPAP Capable
• This is a Pb−Free and Halogen−Free Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
r(NenotteRsqJ1C, 2, 3)
Power Dissipation
RqJC (Notes 1, 2)
Steady
State
TC = 25°C
TC = 100°C
TC = 25°C
TC = 100°C
Continuous Drain Cur-
r(NenotteRsqJ1A, 2 & 3)
Power Dissipation
RqJA (Notes 1 & 2)
Steady
State
TA = 25°C
TA = 100°C
TA = 25°C
TA = 100°C
Pulsed Drain Current TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
TJ, Tstg
40
"20
53
37
58
29
12
8.7
3.1
1.6
165
−55 to
175
Unit
V
V
A
W
A
W
A
°C
Source Current (Body Diode)
IS 53 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, IL(pk) = 28.3 A, L = 0.1 mH)
EAS
40 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
Junction−to−Case − Steady State (Note 2)
RqJC
2.6 °C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
48
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Continuous DC current rating. Maximum current for pulses as long as 1
second are higher but are dependent on pulse duration and duty cycle.
http://onsemi.com
V(BR)DSS
40 V
RDS(on) MAX
10 mW @ 10 V
ID MAX
53 A
Dual N−Channel
D1
D2
G1 G2
S1 S2
1
DFN8 5x6
(SO8FL)
CASE 506BT
MARKING DIAGRAM
D1 D1
S1 D1
G1 5853xx D1
S2 AYWZZ D2
G2 D2
D2 D2
5853N = NVMFD5853N
5853WF = NVMFD5853NWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
ORDERING INFORMATION
Device
Package Shipping†
NVMFD5853NT1G
DFN8 1500 / Tape &
(Pb−Free)
Reel
NVMFD5853NWFT1G DFN8 1500 / Tape &
(Pb−Free)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2013
September, 2013 − Rev. 0
1
Publication Order Number:
NVMFD5853N/D
1 page  
100
Duty Cycle = 0.5
10
0.2
0.1
0.05
1
0.02
0.01
0.1
Single Pulse
0.01
1E−06
1E−05
NVMFD5853N, NVMFD5853NWF
TYPICAL CHARACTERISTICS
1000
100
VGS ≤ 10 V
Single Pulse
TC = 25°C
10 ms
10
100 ms
1
0.1
0.01
0.1
RDS(on) Limit
Thermal Limit
Package Limit
1 10
1 ms
10 ms
dc
100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
RqJA Steady State = 48°C/W
1E−04
1E−03
1E−02
1E−01
1E+00
t, TIME (s)
Figure 14. Thermal Impedance (Junction−to−Ambient)
1E+01
1E+02 1E+03
http://onsemi.com
5
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| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NVMFD5853NWF.PDF ] | |
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