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NSBC115EDXV6 PDF даташит

Спецификация NSBC115EDXV6 изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «Dual NPN Bias Resistor Transistors».

Детали детали

Номер произв NSBC115EDXV6
Описание Dual NPN Bias Resistor Transistors
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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NSBC115EDXV6 Даташит, Описание, Даташиты
MUN5236DW1,
NSBC115EDXV6
Dual NPN Bias Resistor
Transistors
R1 = 100 kW, R2 = 100 kW
NPN Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Rating
Symbol
Max
Unit
Collector-Base Voltage
VCBO
50
Vdc
Collector-Emitter Voltage
VCEO
50
Vdc
Collector Current Continuous
IC 100 mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
10
Vdc
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
Device
Package
Shipping
MUN5236DW1T1G
SOT363
3,000/Tape & Reel
NSBC115EDXV6T1G
SOT563
4,000/Tape & Reel
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
http://onsemi.com
PIN CONNECTIONS
(3) (2) (1)
R1
Q1
R2 R1
(4) (5)
R2
Q2
(6)
MARKING DIAGRAMS
SOT363
CASE 419B
6
7N M G
G
1
SOT563
CASE 463A
7N M G
G
1
7N = Specific Device Code
M = Date Code*
G = Pb-Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
© Semiconductor Components Industries, LLC, 2014
January, 2014 Rev. 1
1
Publication Order Number:
DTC115ED/D









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NSBC115EDXV6 Даташит, Описание, Даташиты
MUN5236DW1, NSBC115EDXV6
THERMAL CHARACTERISTICS
Characteristic
Symbol
MUN5236DW1 (SOT363) ONE JUNCTION HEATED
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
MUN5236DW1 (SOT363) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 2)
(Note 1)
(Note 2)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
Junction and Storage Temperature Range
NSBC115EDXV6 (SOT563) ONE JUNCTION HEATED
TJ, Tstg
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 1)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
RqJA
NSBC115EDXV6 (SOT563) BOTH JUNCTION HEATED (Note 3)
Total Device Dissipation
TA = 25°C
Derate above 25°C
(Note 1)
(Note 1)
PD
Thermal Resistance,
Junction to Ambient
(Note 1)
RqJA
Junction and Storage Temperature Range
TJ, Tstg
1. FR4 @ Minimum Pad.
2. FR4 @ 1.0 × 1.0 Inch Pad.
3. Both junction heated values assume total power is sum of two equally powered channels.
Max
187
256
1.5
2.0
670
490
250
385
2.0
3.0
493
325
188
208
55 to +150
357
2.9
350
500
4.0
250
55 to +150
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
°C/W
°C
mW
mW/°C
°C/W
mW
mW/°C
°C/W
°C
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NSBC115EDXV6 Даташит, Описание, Даташиты
MUN5236DW1, NSBC115EDXV6
ELECTRICAL CHARACTERISTICS (TA = 25°C, common for Q1 and Q2, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
nAdc
100
Collector-Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
nAdc
500
Emitter-Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
mAdc
0.05
Collector-Base Breakdown Voltage
(IC = 10 mA, IE = 0)
Collector-Emitter Breakdown Voltage (Note 4)
(IC = 2.0 mA, IB = 0)
V(BR)CBO
V(BR)CEO
50
50
Vdc
Vdc
ON CHARACTERISTICS
DC Current Gain (Note 4)
(IC = 5.0 mA, VCE = 10 V)
Collector-Emitter Saturation Voltage (Note 4)
(IC = 10 mA, IB = 0.3 mA)
hFE
VCE(sat)
80
150
0.25
V
Input Voltage (Off)
(VCE = 5.0 V, IC = 100 mA)
Input Voltage (On)
(VCE = 0.3 V, IC = 1.0 mA)
Vi(off)
Vdc
1.2 0.5
Vi(on)
Vdc
3.0 1.7
Output Voltage (On)
(VCC = 5.0 V, VB = 5.5 V, RL = 1.0 kW)
Output Voltage (Off)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
Input Resistor
VOL
Vdc
0.2
VOH
4.9
Vdc
R1 70 100 130 kW
Resistor Ratio
R1/R2
0.8
1.0
1.2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle 2%.
400
350
300
250
200
(1) (2)
150
(1) SOT363; 1.0 × 1.0 Inch Pad
(2) SOT563; Minimum Pad
100
50
0
50 25
0 25 50 75 100 125 150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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Номер в каталогеОписаниеПроизводители
NSBC115EDXV6Dual NPN Bias Resistor TransistorsON Semiconductor
ON Semiconductor

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