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Número de pieza | NL17SHT04 | |
Descripción | Inverting Buffer / CMOS Logic Level Shifter | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NL17SHT04 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
No Preview Available ! NL17SHT04
Inverting Buffer /
CMOS Logic Level Shifter
LSTTL−Compatible Inputs
The NL17SHT04 is a single gate inverting buffer fabricated with
silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic−level translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the high−voltage power supply.
The NL17SHT04 input structure provides protection when voltages
up to 7.0 V are applied, regardless of the supply voltage. This allows
the NL17SHT04 to be used to interface 5 V circuits to 3 V circuits.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage − input/output voltage mismatch, battery backup, hot
insertion, etc.
Features
• High Speed: tPD = 3.8 ns (Typ) at VCC = 5 V
• Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
• TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2 V
• CMOS−Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @ Load
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Pin and Function Compatible with Other Standard Logic Families
• These are Pb−Free Devices
IN A 1
GND 2
NC 3
5 VCC
4 OUT Y
Figure 1. Pinout (Top View)
IN A 1
OUT Y
Figure 2. Logic Symbol
http://onsemi.com
MARKING
DIAGRAM
SOT−953
CASE 527AE
LM
1
L = Specific Device Code
M = Month Code
PIN ASSIGNMENT
1 IN A
2 GND
3 NC
4 OUT Y
5 VCC
FUNCTION TABLE
A Input
Y Output
LH
HL
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 0
1
Publication Order Number:
NL17SHT04/D
1 page NL17SHT04
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
D
PIN ONE
INDICATOR
54
1 23
X
Y
E
TOP VIEW
e
5X L
5X L3
A
HE
C
SIDE VIEW
5X L2
5X b
BOTTOM VIEW
0.08 X Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
MILLIMETERS
DIM MIN NOM MAX
A 0.34 0.37 0.40
b 0.10 0.15 0.20
C 0.07 0.12 0.17
D 0.95 1.00 1.05
E 0.75 0.80 0.85
e 0.35 BSC
HE 0.95 1.00 1.05
L 0.175 REF
L2 0.05 0.10 0.15
L3 −−− −−− 0.15
SOLDERING FOOTPRINT*
5X
0.20
5X
0.35
PACKAGE
OUTLINE
1.20
1
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
5
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NL17SHT04/D
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet NL17SHT04.PDF ] |
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