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PDF GS6042 Data sheet ( Hoja de datos )
| Número de pieza | GS6042 | |
| Descripción | 6G UHD-SDI/3G/HD/SD Adaptive Cable Equalizer | |
| Fabricantes | Semtech | |
| Logotipo |  |
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Gennum Products
GS6042
6G UHD-SDI/3G/HD/SD Adaptive
Cable Equalizer
Key Features
• Supports data rates from 125Mb/s to 6.25Gb/s
• SMPTE ST 2081 (proposed), SMPTE ST 424,
SMPTE ST 292, and SMPTE ST 259 compliant
• Automatic cable equalization
• Typical equalized length of Belden 1694A cable:
80m at 5.94Gb/s
210m at 2.97Gb/s
300m at 1.485Gb/s
500m at 270Mb/s
• Supports DVB-ASI at 270Mb/s
• Supports MADI at 125Mb/s
• Manual bypass control
• Programmable carrier detect with squelch threshold
adjustment
• Automatic power-down on loss of signal
• Differential output supports DC-coupling from +1.2V
to +3.3V CML logic
• Optional 6dB flat band gain on input
• Selectable output de-emphasis: 2dB, 6dB, and 8dB
• Standard EIA/JEDEC logic for control/status signals
• Single +3.3V power supply operation
• 180mW power consumption (35mW in sleep)
• Operating temperature range: -40ºC to +85ºC
• Small footprint QFN package (4mm x 4mm)
Footprint compatible with the GS2974A, GS2974B,
GS2984, GS2994, and GS3440
• Pb-free and RoHS compliant
Applications
• SMPTE ST 2081 (proposed), SMPTE ST 424,
SMPTE ST 292, and SMPTE ST 259 coaxial cable serial
digital interfaces
• Serialized 8b/10b encoded video streams up to
6.25Gb/s
Description
The GS6042 is a high-speed BiCMOS device designed to
optimally equalize and restore signals received over 75Ω
coaxial cable.
The device supports data rates up to 6.25Gb/s while being
optimized for the proposed SMPTE ST 2081, as well as
SMPTE ST 424, SMPTE ST 292, and SMPTE ST 259.
The GS6042 features DC restoration to compensate for the
DC content of SMPTE pathological signals.
The Carrier Detect output pin (CD) indicates whether an
input signal has been detected. It can be connected
directly to the SLEEP pin to enable automatic sleep on loss
of input.
A CD threshold is set via the SQ_ADJ pin, allowing the
GS6042 to distinguish between small amplitude SDI signals
and noise at the input of the device.
The equalizing and DC restore stages are disengaged and
no equalization occurs when the BYPASS pin is HIGH. This is
useful for signals launched at the signal source with low
data rates and/or slow rise/fall times.
The GS6042 features a gain selection pin (GAIN_SEL) which
can be used to compensate for 6dB flat attenuation prior to
the input of the device.
The differential output can be DC-coupled to Semtech’s
reclockers and cable drivers, as well as industry-standard
CML logic by changing the voltage applied to the
VCC_O pin. In general, DC-coupling to any termination
voltage between +1.2V and +3.3V is supported.
The GS6042 also features programmable output
de-emphasis with three user-selectable operating levels to
support long PCB traces at the output of the device.
Power consumption of the GS6042 is typically 180mW
when its output is DC-coupled at +1.2V.
The GS6042 is Pb-free, and the encapsulation compound
does not contain halogenated flame retardant. This
component and all homogeneous subcomponents are
RoHS compliant.
GS6042
Final Data Sheet
PDS-060055
Rev. 3
May 2014
www.semtech.com
1 of 21
Proprietary and Confidential
1 page  
Table 1-1: GS6042 Pin Descriptions (Continued)
Pin Number Name
8 SQ_ADJ
9 OP_CTL
10, 11
12
13
DDO, DDO
VEE_O
VCC_O
14 SLEEP
15 CD
16 VCC_A
— Center Pad
Type
Input
Input
Output
Power
Power
Input
Output
Power
Power
Description
Squelch Threshold Adjust.
Adjusts the input signal amplitude threshold of the carrier detect
function. The serial data output of the device can be muted when
the serial data input signal amplitude is too low by connecting the
CD and OP_CTL pins using a suitable resistor network (see
Figure 4-4 and Figure 4-5).
This pin has an internal pull-down resistor.
Note: The SQ_ADJ function is only available when the device is not
configured for auto-sleep mode. Reference Section 4.5 for more
detail.
Output Swing, De-emphasis and Mute Control.
When this pin is connected to GND, the output swing is 850mVppd
with no de-emphasis applied to the output signal.
With this pin connected to +2.5V, the output is muted.
Intermediate voltages and functions are shown in Table 4-5. These
voltages can be achieved as shown in Figure 4-4 and Figure 4-5.
This pin has an internal pull-down resistor.
Serial digital differential output.
Most negative power supply connection for the output buffer.
Connect to ground.
Most positive power supply connection for the output buffer.
Connect to 1.2V - 3.3V DC.
SLEEP Control.
Please refer to the DC Electrical Characteristics table for logic level
threshold and compatibility. This pin is a +2.5V input that is tolerant
to +3.3V levels.
When HIGH the part is powered-down except for the Carrier Detect
function.
This pin can be connected directly to the CD pin to automatically
put the device to sleep (low-power operation) on loss of carrier.
This pin has an internal pull-down resistor.
Note: When SLEEP is connected to CD for automatic power
reduction on loss of carrier, the SQ_ADJ pin will not modify the CD
threshold. The CD threshold will revert to the default value used
when SQ_ADJ is pulled LOW.
Carrier Detect Status Output.
Please refer to the DC Electrical Characteristics table for logic level
threshold and compatibility. This pin is a +2.5V output.
Indicates presence of an input signal. When the CD pin is LOW, a
signal has been detected at the input. When this pin is HIGH, this
indicates loss of input signal.
Most positive power supply connection for the input buffer, core
and control circuits.
Connect to +3.3V DC.
Internally bonded to VEE_A.
Connect to GND with at least 5 vias.
GS6042
Final Data Sheet
PDS-060055
Rev. 3
May 2014
www.semtech.com
5 of 21
Proprietary and Confidential
5 Page 
4. Detailed Description
The GS6042 is a high-speed BiCMOS IC designed to automatically equalize
high-bandwidth serial digital video signals.
The GS6042 can equalize data rates up to 6.25Gb/s including 6G UHD-SDI, 3G SDI, HD
SDI, and SD SDI serial digital signals. The GS6042 is optimized to equalize up to 80m of
Belden 1694A cable at 5.94Gb/s (UHD-SDI), 210m at 2.97Gb/s (3G-SDI), 300m at
1.485Gb/s (HD-SDI), and 500m at 270Mb/s (SD-SDI).
The GS6042 can be powered from a single +3.3V DC power supply, and is
footprint-compatible with Semtech’s GS2974A, GS2974B, GS2984, GS2994, and GS3440
equalizers.
4.1 Serial Digital Inputs
The received serial data signal is connected to the input pins (SDI/SDI) in either a
differential or single-ended configuration. AC-coupling of the inputs is recommended
because the SDI and SDI inputs are internally biased to approximately 1.71V.
See Figure 5-1 for the recommended input applications circuit when using a
single-ended 75Ω coax cable.
4.2 Automatic (Adaptive) Cable Equalization
The input signal passes through a variable gain equalizing stage, whose frequency
response closely matches the inverse of the Belden 1694A cable loss characteristic for
any given attached cable length within the supported ranges.
The equalized signal is DC-restored, effectively restoring the logic threshold of the
equalized signal to its correct level independent of shifts due to AC-coupling.
4.3 Differential Digital Data Output
The digital data output signals (DDO/DDO) have a nominal output voltage swing of
either 850mVppd or 425mVppd (ΔVDDO), as set by the OP_CTL pin. Table 4-1 shows the
typical output common mode voltage levels (VCMOUT) related to the two output swing
options and the type of output transmission termination as shown in Figure 4-1 and
Figure 4-2.
GS6042
Final Data Sheet
PDS-060055
Rev. 3
May 2014
www.semtech.com
11 of 21
Proprietary and Confidential
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet GS6042.PDF ] | |
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