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PDF NSS20500UW3 Data sheet ( Hoja de datos )
| Número de pieza | NSS20500UW3 | |
| Descripción | PNP Transistor | |
| Fabricantes | ON Semiconductor | |
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NSS20500UW3
20 V, 7.0 A, Low VCE(sat)
PNP Transistor
ON Semiconductor’s e2PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical applications are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e2PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
• This is a Pb−Free Device
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol Max
Unit
Collector-Emitter Voltage
Collector-Base Voltage
Emitter-Base Voltage
Collector Current − Continuous
Collector Current − Peak
Electrostatic Discharge
VCEO
VCBO
VEBO
IC
ICM
ESD
−20 Vdc
−20 Vdc
−7.0 Vdc
−5.0 Adc
−7.0 A
HBM Class 3B
MM Class C
THERMAL CHARACTERISTICS
Characteristic
Symbol Max
Unit
Total Device Dissipation, TA = 25°C
Derate above 25°C (Note 1)
PD 875 mW
7.0 mW/°C
Thermal Resistance,
Junction−to−Ambient (Note 1)
RqJA
143 °C/W
TDoetraaltDe eavbioceveD2is5s°iCpa(tNioont,eT2A) = 25°C
PD
1.5 W
11.8 mW/°C
Thermal Resistance,
Junction−to−Ambient (Note 2)
RqJA
85 °C/W
Thermal Resistance,
Junction−to−Lead #1 (Note 2)
RqJL
23 °C/W
Total Device Dissipation
(Single Pulse < 10 sec) (Notes 2, 3)
PDsingle
3.0
W
Junction and Storage Temperature Range TJ, Tstg
−55 to
+150
°C
Operating Case Temperature (Note 1)
TC −55 to °C
+125
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ 100 mm2, 1 oz copper traces.
2. FR−4 @ 500 mm2, 1 oz copper traces.
3. Thermal response.
© Semiconductor Components Industries, LLC, 2012
November, 2012 − Rev. 3
1
http://onsemi.com
−20 VOLTS
7.0 AMPS
PNP LOW VCE(sat) TRANSISTOR
EQUIVALENT RDS(on) 50 mW
COLLECTOR
3
1
BASE
2
EMITTER
2
1
3
WDFN3
CASE 506AU
MARKING DIAGRAM
VC M
G
1
VC = Specific Device Code
M = Date Code
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NSS20500UW3T2G WDFN3
(Pb−Free)
3000/
Tape & Reel
NSS20500UW3TBG WDFN3
(Pb−Free)
3000/
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
NSS20500UW3/D
1 page  
NSS20500UW3
PACKAGE DIMENSIONS
D
PIN ONE
REFERENCE
2X 0.10 C ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ
2X
0.10 C
TOP VIEW
0.10 C
8X
0.08 C
SEATING
PLANE
A1
2X L
1
SIDE VIEW
D2
e
WDFN3
CASE 506AU
ISSUE O
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 .
2. CONTROLLING DIMENSION: MILLIMETERS.
B
3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS
MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS
THE TERMINALS.
MILLIMETERS
INCHES
DIM MIN
NOM MAX
MIN NOM MAX
A 0.70
0.75
0.80
0.028 0.030 0.031
A1 0.00
0.05
0.000
0.002
E
A3 0.20 REF
b 0.25 0.30 0.35
0.008 REF
0.010 0.012 0.014
D 2.00 BSC
0.079 BSC
D2 1.40
1.50
1.60
0.055 0.059 0.063
E 2.00 BSC
0.079 BSC
E2 0.90
1.00
1.10
0.035 0.039 0.043
e 1.30 BSC
0.051 BSC
K 0.35 REF
0.014 REF
L 0.35 0.40 0.45 0.014 0.016 0.018
A
(A3)
C
SOLDERING FOOTPRINT*
2X 0.400
1.300
0.250
0.600
e/2
2
K
E2
1.100
0.300
0.400
1.600
0.275
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
3
3X b
BOTTOM VIEW
0.10 C A B
0.05 C NOTE 3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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http://onsemi.com
5
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NSS20500UW3/D
5 Page | ||
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| PDF Descargar | [ Datasheet NSS20500UW3.PDF ] | |
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