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74LVC540A PDF даташит

Спецификация 74LVC540A изготовлена ​​​​«ON Semiconductor» и имеет функцию, называемую «Low-Voltage CMOS Octal Buffer Flow Through Pinout».

Детали детали

Номер произв 74LVC540A
Описание Low-Voltage CMOS Octal Buffer Flow Through Pinout
Производители ON Semiconductor
логотип ON Semiconductor логотип 

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74LVC540A Даташит, Описание, Даташиты
74LVC540A
Product Preview
Low-Voltage CMOS
Octal Buffer
Flow Through Pinout
With 5 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The 74LVC540A is a high performance, inverting octal buffer
operating from a 1.2 to 3.6 V supply. This device is similar in function
to the MC74LCX240, while providing flow through architecture.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
74LVC540A inputs to be safely driven from 5 V devices. The
74LVC540A is suitable for memory address driving and all TTL level
bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OE1, OE2) inputs, when HIGH, disables the outputs by placing them
in a HIGH Z condition.
Features
Designed for 1.2 to 3.6 V VCC Operation
5 V Tolerant − Interface Capability With 5 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
24 mA Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 250 mA
ESD Performance:
Human Body Model > 2000 V
Machine Model > 200 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
20
1
SOIC−20 WB
DW SUFFIX
CASE 751D
MARKING
DIAGRAMS
20
LVC540A
AWLYYWWG
1
20
1
TSSOP−20
DT SUFFIX
CASE 948E
20
LVC
540A
ALYW G
G
1
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. P0
1
Publication Order Number:
74LVC540A/D









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74LVC540A Даташит, Описание, Даташиты
74LVC540A
VCC OE2 O0 O1 O2 O3 O4 O5 O6 O7
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
OE1 D0 D1 D2 D3 D4 D5 D6 D7 GND
Figure 1. Pinout: 20−Lead (Top View)
PIN NAMES
Pins
OEn
Dn
On
Function
Output Enable Inputs
Data Inputs
3−State Outputs
TRUTH TABLE
Inputs
Outputs
OE1
OE2
Dn
On
LLL
H
L LH
L
XHX
Z
HXX
Z
H = High Voltage Level
L = Low Voltage Level
Z = High Impedance State
X = High or Low Voltage Level and Transitions are Acceptable
For ICC reasons, DO NOT FLOAT Inputs
1
OE1
19
OE2
D0
2
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
18
O0
17
O1
16
O2
15
O3
14
O4
13
O5
12
O6
11
O7
Figure 2. Logic Diagram
www.onsemi.com
2









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74LVC540A Даташит, Описание, Даташиты
74LVC540A
MAXIMUM RATINGS
Symbol
Parameter
Value
Condition
Unit
VCC DC Supply Voltage
VI DC Input Voltage
VO DC Output Voltage
−0.5 to +6.5
−0.5 VI +6.5
−0.5 VO +6.5
−0.5 VO VCC + 0.5
Output in 3−State
Output in HIGH or LOW State
(Note 1)
V
V
V
V
IIK DC Input Diode Current
IOK DC Output Diode Current
IO
ICC
IGND
TSTG
TL
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current Per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for
10 Seconds
−50
−50
+50
±50
±100
±100
−65 to +150
TL = 260
VI < GND
VO < GND
VO > VCC
mA
mA
mA
mA
mA
mA
°C
°C
TJ Junction Temperature Under Bias
qJA Thermal Resistance (Note 2)
TJ = 135
SOIC = 65.8
TSSOP = 110.7
°C
°C/W
MSL
Moisture Sensitivity
Level 1
ILATCHUP Latch−up Performance at VCC = 3.6 V
and 125°C (Note 3)
±250
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
3. Tested to EIA/JES078.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ Max Units
VCC Supply Voltage
Operating
Functional
V
1.65 3.6
1.2 3.6
VI Input Voltage
VO Output Voltage
HIGH or LOW State
3−State
0 5.5 V
V
0 VCC
0 5.5
IOH HIGH Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
mA
−24
−12
IOL LOW Level Output Current
VCC = 3.0 V − 3.6 V
VCC = 2.7 V − 3.0 V
mA
24
12
TA Operating Free−Air Temperature
−40
+125
°C
Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V 0 10 ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
www.onsemi.com
3










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Номер в каталогеОписаниеПроизводители
74LVC540AOCTAL BUFFER/ LINE DRIVERDiodes
Diodes
74LVC540ALow-Voltage CMOS Octal Buffer Flow Through PinoutON Semiconductor
ON Semiconductor

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